Scaling of Josephson Logic Circuits.

T. Fujimori, Akira Nakajima, Masanori Sugahara +1 more

D. W. Jillie, L. N. Smith, Harry Kroger

Heinz Jäckel

Y. Harada, Yuji Hatano, Kunio Yamashita +1 more

Abstract This paper proposes a Josephson threshold logic circuit, which is best suited to high‐speed operations. Using the proposed circuit, the adder can be constructed by four Josephson elements. The scale of the circuit can be reduced both in the number of circuits and the number of logic stages, compared with the conventional Josephson logic circuits. The circuit is shown to be useful in the realization of the high‐speed and highly integrated adders and multipliers. Then it is demonstrated that the Josephson threshold logic circuit can be constructed by the magnetically coupled interferometer element, the current‐injection interferometer element and the direct‐coupled element. A typical circuit construction is shown with the adder as an example. To verify the correct operation of the Josephson threshold logic circuit, a 1‐bit adder by magnetically coupled interferometer elements was constructed by Nb‐Pb alloy process, and the operation of the circuit was verified.

P. D. Shaju, V. C. Kuriakose

Hirotaka Terai, Y. Hashimoto, Shinichi Yorozu +3 more

Timing jitter is an important constraint for the performance of SFQ circuits. We focus on the timing jitter in a Josephson transmission line (JTL) that induces timing errors at logic gates. A proper data analysis of 2-bit shift registers gave a jitter value of about 0.08 ps for a single Josephson junction in a JTL powered at a designed bias current. The variations in timing parameters of logic cells also give rise to timing errors. We experimentally determined the timing parameters in several logic cells and found that the deviations between actual and nominal values are within 2 ps. The relationship between the gray zone and circuit scale was estimated by extrapolating the transition curves observed in 2-bit shift registers. The estimated circuit scale was 20,000-100,000 JJs and 1,000 JJs at an operating clock frequency of 20 GHz and 40 GHz, respectively.