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Elsevier eBooks

PHASE-COUPLED JOSEPHSON LOGIC CIRCUIT

T. Fujimori, Akira Nakajima, Masanori Sugahara, H. Kaneda

Published Jan 1, 1982• 0 citations
Publisher
DOI
10.1016/b978-0-408-01252-2.50084-4

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IEEE Transactions on Applied Superconductivity•Jun 1, 1997•3 citations
The switching mechanism of a direct-coupled Josephson logic gate, a four-junction logic (4JL) gate, has been investigated. It was found that a high-speed input signal current is wasted in an input-output separation resistance mi). We have developed a speedup method in which an inductance is connected to Ri in series. The value of the inductance was found to be five times larger than the effective inductance of the input junction. 40 % speedup of the gate switching was demonstrated by a logic delay experiment using submicron NbN/MgO/NbN junction technology. The minimum logic delay of 3.0 ps/gate was obtained with fan-out 1.
We present the design and the fabrication of an adder circuit in the extended phase-mode logic family. The phase-mode logic is a single flux quantum (SFQ) logic which utilizes an SFQ as an information bit carrier. The single-bit adder circuit is made up of an INHIBIT gate which is the basic device of the phase-mode logic. The circuit has been designed and fabricated using Nb/AlO/sub x//Nb Josephson junctions with Josephson critical current density of 1.0 kA/cm/sup 2/. In order to confirm the circuit operation, the fabricated adder circuit has been tested at low speed. For investigating the possibility of a high-frequency operation, dc voltages generated by fluxon pulse trains have been measured. From the Josephson voltage-frequency relation, the result shows that the circuit has potential to complete the carry operation within 20 psec.