Large-scale integration of single flux quantum (SFQ) circuits requires components as compact as possible. In this paper, we study the feasibility of integrating vertically stacked Josephson inductors (VSJIs) fabricated with self-shunted Josephson junctions into our SFQ-based circuits, and use both dc and RF electrical measurements to verify the performance of these junction stacks as compact inductors. The VSJIs consist of three Josephson junctions stacked vertically and are inserted into test structures to validate their potential as compact alternatives to geometrical inductors. The VSJIs are designed to be non-switching junctions and are combined with smaller area, switching Josephson junctions fabricated with the same junction barrier process. The VSJIs have a designed critical current of approximately 50% greater than that of the switching junctions, and their observed behavior can be modeled correctly by including the known nonlinearity of the Josephson inductance. To confirm that this nonlinearity does not degrade the expected bias margins, we simulate two common types of SFQ cells with the geometrical inductors replaced by VSJIs. The results verify that incorporating VSJIs in SFQ circuits would increase circuit density with minimal impact on circuit margins.
Large-scale integration of single flux quantum (SFQ) circuits requires components as compact as possible. In this paper, we study the feasibility of integrating vertically stacked Josephson inductors (VSJIs) fabricated with self-shunted Josephson junctions into our SFQ-based circuits, and use both dc and RF electrical measurements to verify the performance of these junction stacks as compact inductors. The VSJIs consist of three Josephson junctions stacked vertically and are inserted into test structures to validate their potential as compact alternatives to geometrical inductors. The VSJIs are designed to be non-switching junctions and are combined with smaller area, switching Josephson junctions fabricated with the same junction barrier process. The VSJIs have a designed critical current of approximately 50% greater than that of the switching junctions, and their observed behavior can be modeled correctly by including the known nonlinearity of the Josephson inductance. To confirm that this nonlinearity does not degrade the expected bias margins, we simulate two common types of SFQ cells with the geometrical inductors replaced by VSJIs. The results verify that incorporating VSJIs in SFQ circuits would increase circuit density with minimal impact on circuit margins.
Abstract We report on the electrical properties of NbN/TaN/NbN Josephson junctions grown on thermally oxidized silicon substrates, along with the design and fabrication of superconducting single-flux-quantum (SFQ) circuits based on these NbN superconductor/normal metal/superconductor (SNS) junctions. The critical current density ( J c ) of the junctions was found to be relatively sensitive to the barrier thickness, decreasing from 108.0 ± 8.1 kA cm −2 for a 15 nm barrier to 12.8 ± 1.9 kA cm −2 for a 30 nm barrier. For a J c of approximately 24.5 ± 2.1 kA cm −2 and a barrier thickness of 25 nm, the NbN SNS junctions are self-shunted and exhibit nonhysteretic current–voltage ( I – V ) characteristics. Especially for junctions with diameter ( φ ) ranging from 0.8 to 1.6 μ m, their critical current ( I c ) falls within the range of 110–450 μ A, making them suitable for SFQ circuits. By considering the impact of excess current and incorporating it as an additional term in the conventional resistively and capacitively shunted junction model, the I – V curves of NbN SNS junctions can be precisely described, successfully minimizing the deviation between simulations and test results. The DC-SFQ and SFQ-DC interface circuits can both operate normally, and the bias margins of cell circuits such as Josephson transmission line, confluence buffer, D flip-flop, and splitter are greater than 40%. Compared to Nb superconductor/insulator/superconductor junctions, their self-shunting characteristics and relatively thick 25 nm barriers can also enhance the integration of circuits and increase the yield to complex circuits.
Superconducting quantum circuits rely on compact, low-loss inductive elements, strong anharmonicity, and robust flux biasing to realize coherent and controllable quantum bits. This thesis investigates how vertically stacked Josephson junction arrays can be employed to meet these requirements and enable compact flux qubits operated in the quarton regime. In the first part, stacked Al/AlOx/Al Josephson junctions are established as compact linear inductors. Their three-dimensional geometry reduces parasitic capacitance to ground while allowing multiple junctions to be integrated within a small footprint. A numerical modeling approach is used to quantify stray capacitances, Coulomb screening, and collective modes of extended stacked junction arrays. Cryogenic transport measurements confirm strongly underdamped junction dynamics with uniform junction characteristics, demonstrating their suitability as low-loss inductive elements in superconducting circuits. In the second part, these inductors are integrated into flux qubits operated in the quarton regime. In this regime, the qubit potential becomes nearly quartic around half-flux bias, resulting in positive anharmonicity and first-order insensitivity to flux noise at the operating point. Spectroscopy reveals qubit transition frequencies in the 3–5 GHz range and anharmonicities of 0.5–1.5 GHz, consistent with the expected quartic potential landscape. To distinguish intrinsic from externally induced decoherence, a persistent-current bias scheme is implemented, enabling stable and low-noise flux biasing over time scales of up to one week. A direct comparison between conventionally biased and persistently biased devices rules out external flux noise as the dominant coherence-limiting mechanism. High-resolution spectroscopy identifies avoided level crossings caused by microscopic two-level systems (TLS) in the amorphous tunnel barriers of the stacked junctions. A systematic cumulative analysis of splitting statistics across multiple devices shows that the spectral TLS density scales with the total tunnel-barrier area, while the array length determines the effective qubit–TLS coupling strength. The measured relaxation times follow scaling relations consistent with Fermi’s golden rule for a bath of weakly coupled TLS, demonstrating that TLS in the stacked junction arrays constitute the dominant intrinsic decoherence channel in quarton qubits. These results establish stacked Josephson junction arrays as compact superinductive elements and provide an understanding of coherence limitations in superconducting quantum circuits based on Josephson junction arrays, offering guidance for future device optimization.
Superconducting digital circuits based on Josephson junctions with amorphous niobium-silicon (a-NbSi) barriers have been designed, fabricated, and tested. Single-flux-quantum (SFQ) shift registers operated with ±30% bias margins, confirming junction reproducibility and uniformity. Static digital dividers operated up to 165 GHz for a single value of bias current, which was only marginally slower than circuits fabricated with externally shunted AlOx-barrier junctions having a comparable critical current density of 4.5 kA/cm2. In comparison, self-shunted a-NbSi junctions enabled a doubling in circuit density. This and their relatively thick 10 nm barriers could increase the yield of complex SFQ circuits.
To improve circuit density and minimize static power dissipation in Single Flux Quantum (SFQ) circuits, this work investigates the application of inductively biased, unshunted Josephson transmission lines (JTLs) which achieve zero static power, compared with regular resistively biased JTLs. Both simulation and experiment results confirm that unshunted JTLs can reliably propagate SFQ pulses with a bias current margin larger than 50%. Based on this, a new fabrication process has been developed featuring eight niobium (Nb) layers, including two Nb/Al-AlOx/Nb junction layers, a dedicated bias-inductor layer, and dual DC-power layers. The vertical functional separation allows 2 active layers. The 1stactive layer uses conventional shunted JJs for logic gates, while the 2nduses unshunted JTLs with inductive bias. This configuration eliminates static power in the interconnect network and simplifies thermal management in stacked Rapid SFQ (RSFQ) architectures. A ten-stage unshunted JTL chain and a hybrid half-adder were designed and demonstrated. Measurements show a 66.7% reduction in static power and a 64.7% reduction in area compared with the Chinese Academy of Scienceconventional single-JJ-layer process. These results verify, for the first time, that inductively biased unshunted interconnects can be monolithically integrated with standard RSFQ logic, offering a scalable path toward ultra-dense, lower-power multilayer superconducting circuits.
Single flux quantum (SFQ) technology has garnered significant attention due to its low switching power and high operational speed. Researchers have been actively pursuing more advanced devices and technologies to further reduce the reliance on inductors, bias, and dynamic power. Recently, innovative magnetic Josephson junction devices have emerged, enhancing the field of superconductor electronics logic. This article introduces a novel cell library design that relies entirely on Josephson junctions, showing promising potential for eliminating the need for inductors in conventional SFQ cells. This results in a 55% reduction in cell size and an 80% decrease in both static and dynamic power consumption. The proposed library implements a half flux quantum logic, where each pulse duration is half that of a SFQ pulse. This article presents the schematics of the basic cells, emphasizing critical circuit parameters and their margins. In addition, it examines layout blueprints, showcasing the advantageous area-saving characteristics of the proposed design.
Superconductor electronics fabrication technology developed at MIT Lincoln Laboratory enables the development of VLSI digital circuits with millions of Josephson junctions per square centimeter. However, conventional DC and multi-phase AC biasing techniques already encounter serious challenges for scaling circuits above several hundred thousand junctions. In this work, we propose a novel AC-based biasing scheme for RSFQ-type logic families requiring DC bias. The major step toward this scheme is a superconducting AC/DC rectifier which we introduced at ASC 2014. We proposed to connect the rectifiers to “payload cells” via superconducting inductors with large inductance in order to reduce parasitic effects of flux quantization. Recently, we discovered that this powering scheme works even better at a much lower value of the inductance, when it is just sufficient to hold only one or two flux quanta in the inductive loop between the converter and the payload. In this case, flux quantization in the loop becomes beneficial because the value of current fed into the payload is defined by the value of the coupling inductance. Therefore, our AC/SFQ converter powers the payload cell by single flux quanta rather than by DC current. Such mode of operation is extremely energy efficient because energy is used only to recover the flux quantum consumed by the cell during the logic operation. We present designs of AC/SFQ converters comprising an AC/DC rectifier and a current conditioning circuit which we termed an SFQ filter. We also present test results and demonstrate AC/SFQ powering a payload circuit using circuits fabricated in a new, 150-nm node of Lincoln Laboratory fabrication technology using self-shunted Nb/AlOx-Al/Nb Josephson junctions with 600 μA/μm2critical current density and 200 nm minimum linewidth of inductors.