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Technical digest - International Electron Devices Meeting/Technical digest

SPICE models and applications of superconducting FETs and higher-voltage Josephson gates

Uttam Ghoshal, T. Van Duzer, Harry Kroger

Published Dec 9, 2002• 6 citations
Publisher

Abstract

The authors describe the development of circuit models, applications of superconducting field effect transistors (SFETs), and higher-voltage Josephson junction (HVJJ) circuits which are important for the feasibility of several novel hybrid superconducting-semiconducting circuits. They also discuss the delay optimization involved in designing and embedding interface circuits in a hybrid superconductor-semiconductor technology. It is noted that, with the advances made in semiconductor technologies, interfaces between the two technologies are practical now and the advantages of hybrid circuits in various applications should be realizable in practice. In the case of interfacing typical Nb-based Josephson junction circuits to 0.5 mu m CMOS technologies, it was estimated that the minimum delay through the interface is approximately 110 ps and the optimum number of junctions in each branch of the HVJJ circuits is 10.>

DOI
10.1109/iedm.1991.235381

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The authors describe the development of circuit models, applications of superconducting field effect transistors (SFETs), and higher-voltage Josephson junction (HVJJ) circuits which are important for the feasibility of several novel hybrid superconducting-semiconducting circuits. They also discuss the delay optimization involved in designing and embedding interface circuits in a hybrid superconductor-semiconductor technology. It is noted that, with the advances made in semiconductor technologies, interfaces between the two technologies are practical now and the advantages of hybrid circuits in various applications should be realizable in practice. In the case of interfacing typical Nb-based Josephson junction circuits to 0.5 mu m CMOS technologies, it was estimated that the minimum delay through the interface is approximately 110 ps and the optimum number of junctions in each branch of the HVJJ circuits is 10.>
In this paper, the author describes studies on electronic devices and circuits utilizing both of superconductors and semniconductors. First, a design of an interface circuit composed of Josephson junctions and MOSFETs is described. The Josephson-MOS interface circuit will be used for realizing high-speed data communication between a Josephson digital circuit and a semiconductor one. Second, fabrication and characterization of MOSFETs with superconductive NbN gate electrodes are described. The use of superconductive gates makes it easy to hybridize MOSFETs with Josephson junctions. Finally, studies of Josephson-CMOS hybrid memory circuits are introduced.
Scalability in the fabrication and operation of quantum computers is key to move beyond the NISQ era. So far, superconducting transmon qubits based on aluminum Josephson tunnel junctions have demonstrated the most advanced results, though this technology is difficult to implement with large-scale facilities. An alternative "gatemon" qubit has recently appeared, which uses hybrid superconducting/semiconducting (S/Sm) devices as gate-tuned Josephson junctions. Current implementations of these use nanowires however, of which the large-scale fabrication has not yet matured either. A scalable gatemon design could be made with CMOS Josephson Field-Effect Transistors as tunable weak link, where an ideal device has leads with a large superconducting gap that contact a short channel through high-transparency interfaces. High transparency, or low contact resistance, is achieved in the microelectronics industry with silicides, of which some turn out to be superconducting. The first part of the experimental work in this thesis covers material studies on two such materials: V3Si\text{V}_3\text{Si}V3​Si and PtSi, which are interesting for their high TcT_\text{c}Tc​, and mature integration, respectively. The second part covers experimental results on 50 nm gate length PtSi transistors, where the transparency of the S/Sm interfaces is modulated by the gate voltage. At low voltages, the transport shows no conductance at low energy, and well-defined features at the superconducting gap. The barrier height at the S/Sm interface is reduced by increasing the gate voltage, until a zero-bias peak appears around zero drain voltage, which reveals the appearance of an Andreev current. The successful gate modulation of Andreev current in a silicon-based transistor represents a step towards fully CMOS-integrated superconducting quantum computers.
Superconducting logic circuits based on Josephson junctions (JJ) are the fastest, lowest power solid state digital circuit technology known. Large scale integration of such circuits has also been demonstrated. By contrast, current superconducting memory circuits based on flux quantization are not equivalently advanced. Very dense memory chips have not been possible to date and seem unlikely to come without new invention. The goal of this project was to explore alternative approaches to memory that would be compatible with Josephson junction logic circuits and capable of much denser memory arrays. Five new approaches were investigated ranging from modification to the current approach, use of semiconductor CMOS and wholly new concepts based on new physical principles. Three of these were identified as worth pursuing. They are use of cooled CMOS, use of cryogenic hybrid JJ/CMOS memory concepts and a totally new magnetoresistive approach to memory based on the superconductor/ferromagnet proximity effect.
Interface circuits are the key components that enable the hybrid integration of superconductor and semiconductor digital electronics. The design requirements of superconductor-semiconductor interface circuits vary depending on the application, such as high-performance classical computing, superconducting quantum computing, and digital signal processing. In this survey, various interface circuits are categorized based on the working principle and structure. The superconducting output drivers are explored, which are capable of converting and amplifying, e.g., single flux quantum (SFQ) voltage pulses, to voltage levels that semiconductor circuits can process. Several trade-offs between circuit- and system-level design parameters are examined. Accordingly, parameters such as the data rate, output voltage, power dissipation, layout area, thermal/heat load of cryogenic cables, and bit-error rate are considered.
An output voltage of 150 mV was obtained with a risetime of less than 200 ps at the driver, which contained 104 junctions and 2 resistors. The driver was also used to drive a D-HEMT (high-electron mobility transistor), and an output voltage of 0.9 V with a risetime of 500 ps was obtained from the HEMT. This experiment suggests that the Josephson driver developed can be used for a Josephson computer or a SQUID (superconducting quantum interference device) system as an interface gate to drive room-temperature electronic devices.>
The superconducting tunnel effect predicted by Brian Josephson in 1962 is looking increasingly promising for another very practical application—as logic and memory circuits for computers. Josephson-junction circuits are capable of high switching speeds (50–100 picosec have already been obtained). And because such circuits operate at voltages comparable to the superconducting energy gap, the heat generated is typically microwatts, thousands of times lower than high-speed transistor circuits. The diminished heat-removal problem allows one to pack the Josephson circuits much closer than semiconductor circuits. Once high switching speeds are achieved, this packability becomes extremely important because then the major limitation on computer speed is how fast the electrical signal takes to move from one circuit to another.