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Telecommunication Engineering

Research Progress of Chip-Scale Atomic Clock,CPT Clock

Lin Yang

Published Jan 1, 2010• 1 citation
OpenAlex

Abstract

This paper introduces the chip-scale atomic clock(CSAC) based on coherent population trap(CPT) theory. CPT clock is the representative of atomic miniature atomic clock in the future. Standing progress has been made for CPT clock in designing techniques, manufacturing technology, and physics mechanism,in recent years. Principle prototype of the CSAC has been developed. According to the developing trend, product of the CSAC will be offered to customer in three or five years.

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Research on chip-scale atomic clocks (CSACs) based on coherent population trapping (CPT) is reviewed. The background and the inspiration for the research are described, including the important schemes proposed to improve the CPT signal quality, the selection of atoms and buffer gases, and the development of micro-cell fabrication. With regard to the reliability, stability, and service life of the CSACs, the research regarding the sensitivity of the CPT resonance to temperature and laser power changes is also reviewed, as well as the CPT resonance's collision and light of frequency shifts. The first generation CSACs have already been developed but its characters are still far from our expectations. Our conclusion is that miniaturization and power reduction are the most important aspects calling for further research.

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•Sep 1, 2004•55 citations
This paper introduces the chip-scale atomic clock(CSAC) based on coherent population trap(CPT) theory. CPT clock is the representative of atomic miniature atomic clock in the future. Standing progress has been made for CPT clock in designing techniques, manufacturing technology, and physics mechanism,in recent years. Principle prototype of the CSAC has been developed. According to the developing trend, product of the CSAC will be offered to customer in three or five years.
Research on chip-scale atomic clocks (CSACs) based on coherent population trapping (CPT) is reviewed. The background and the inspiration for the research are described, including the important schemes proposed to improve the CPT signal quality, the selection of atoms and buffer gases, and the development of micro-cell fabrication. With regard to the reliability, stability, and service life of the CSACs, the research regarding the sensitivity of the CPT resonance to temperature and laser power changes is also reviewed, as well as the CPT resonance's collision and light of frequency shifts. The first generation CSACs have already been developed but its characters are still far from our expectations. Our conclusion is that miniaturization and power reduction are the most important aspects calling for further research.
Ever since the idea of the chip-scale atomic clock (CSAC) based on coherent population trapping (CPT) transition theory was proposed, the CSAC has been used widely in many various fields because of its characteristics of low power consumption, small size and good performance. It can be used in micro-positioning navigation and timing system, geophysical prospecting of the ocean bottom, and 5G communication system. Researchers work on reducing its volume and power consumption to make it more widely used. In the meantime, we all made great effort to improve its long-term stability. In this paper, we report our progress toward chip-scale atomic clock based on the87Rb CPT transition during 2019. We reduced the volume of the CSAC from 20 cm3to 12 cm3. For the physical part, we optimized the structure of the physical package to make sure it is possible for mass production. For the electrical part, we redesigned and rearranged the circuit, optimized the temperature control algorithm, employed a disciplining method. Finally, the frequency stability of CSAC was obtained to be 3.66×10-11, 6.39×10-12and 3.42 ×10-13at the interrogation time of 1 s, 103s and 104s respectively.
The authors are developing chip-scale atomic clocks (CSACs) based on the85Rb coherent population trap (CPT) transition. As an intermediate milestone, we have developed a miniature atomic clock prototype. In this paper, we report on the design combing the miniature physics part, low-power digital control circuits and low-power microwave system, and the process that enable an atomic clock to be made with an overall size of 20 cm3volume, power consumption about 400 mWatts, and an Allen Deviation at 100 s of 2.9E-11.
We have undertaken a development effort to produce a prototype chip-scale atomic clock (CSAC). The design goals include short-term stability, with a total power consumption of less than 30 mW and overall device volume <1 cubic cm. The stringent power requirement dominates the physics package architecture, necessarily dictating a small volume gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002 and PTTI 2003, we reported on laboratory experiments that underlie the fundamental architecture of our CSAC, based on interrogation of the cesium D1 transition by the technique of coherent population trapping (CPT). In the past year, the development effort has shifted from fundamental research and feasibility investigation to engineering and prototype development. In this paper, we report on the design of a rugged and compact physics package that is expected to exceed the ultimate performance and power requirements of the CSAC.
We have undertaken the development of a chip-scale atomic clock (CSAC) whose design goals include short-term stability, sigma(sub y)(tau=1 hour), of 1x10(exp 11) with a total power consumption of 30 mW and an overall device volume of 1 cu cm. The stringent power requirement dominates the physics package architecture, dictating a small (<5 mm(exp 3) gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002, we reported on initial experimental investigations leading to the decision to employ the coherent population trapping (CPT) interrogation technique. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser (VCSEL) sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass. Measurements of the signal contrast and linewidth of both the cesium D1 and D2 resonance transitions are compared, and frequency stability measurements of the CSAC testbed are presented.