The authors have designed, fabricated and tested all-refractory DC SQUIDs in Nb-Al/sub 2/O/sub 3/-Nb trilayer technology that have noise performance comparable to the best previously reported for any technology. A variety of SQUID designs were incorporated as part of a trilayer process development test vehicle. SQUID inductance, junction area, and resistive shunt geometry were varied in matrix fashion to give SQUIDs with near-optimum parameter values for a factor of five range in Josephson current density and shunt sheet resistance. The devices were fabricated using a selective niobium anodization with a minimum feature size of 2 mu m. The base electrode and Nb wiring were patterned with dry etching, and the junction areas were defined by anodization: the Ti resistors were patterned with a lift-off process. Current density on different wafers was varied from 400 to 1000 A/cm/sup 2/ with typical junction V/sub m/'s of 60 mV. The shunt sheet resistance was varied in the 1-5- Omega / Square Operator range. The noise was measured with an RF SQUID direct small-signal readout scheme. A 50-pH SQUID with 3- mu m/sup 2/, 16- mu A junctions and 14- Omega shunt resistors was shown to have an ideally low white noise of 1*10/sup -13/ Phi /sub 0//sup 2//Hz, a white to 1/f crossover frequency at 7 Hz, and a noise level less than 6*10/sup -12/ Phi /sub 0//sup 2//Hz at 0.1 Hz.
We have demonstrated a new planarized all-refractory technology for low Tc superconductivity (PARTS). With the exception of the Nb-AlOx-Nb trilayer preparation, the processing is done almost exclusively within an advanced Si technology fabrication facility. This approach has allowed us to leverage highly off of existing state-of-the-art lithography, metal etching, materials deposition, and planarization capabilities. Using chemical-mechanical polish as the planarization technique we have fabricated Josephson junctions ranging in size from 0.5–100 μm2. Junction quality is excellent with the figure of merit Vm typically exceeding 70 mV. PARTS has yielded fully functional integrated Josephson devices including magnetometers, gradiometers, and soliton oscillators.
Abstract Josephson tunnel junctions form the basis for various superconductor electronic devices. For this reason, enormous efforts are routinely taken to establish and later on maintain a scalable and reproducible wafer-scale manufacturing process for high-quality Josephson junctions. Here, we present an anodization-free fabrication process for Nb/Al-AlO x /Nb cross-type Josephson junctions that requires only a small number of process steps and that is in general intrinsically compatible with wafer-scale fabrication. We show that the fabricated junctions are of very high quality and, compared to other junction types, exhibit not only a significantly reduced capacitance but also an almost rectangular critical current density profile. Our process hence enables the usage of low capacitance Josephson junctions for superconductor electronic devices such as ultra-low noise dc-superconducting quantum interference devices (SQUIDs), microwave SQUID multiplexers based on non-hysteretic rf-SQUIDs and RFSQ circuits.
Nb/Al-AlOx/Nb Josephson junctions are widely used in superconducting quantum interference devices and rapid single flux quantum (RSFQ) circuits. Very large-scale RSFQ integration often has a strict requirement on wafer-scale junction qualities. In particular, Nb film stress in Nb/Al-AlOx/Nb trilayer based Josephson junctions is a critical factor affecting their qualities. In this work, we develop a multi-step sputtering process to prepare Nb films with different combinations of stress and roughness to investigate the correlation between Nb film stress and junction quality. In particular, this method allows us to prepare Nb films with almost the same roughness but different stress, a key factor to study solely the influence of stress on junction qualities. Our measurements indicate that within a very tight range of film roughness (less than 2 nm), tensile film stress is found to decrease the quality of Nb/Al-AlOx/Nb Josephson junctions and larger film roughness has a positive effect on junction quality. By decreasing the total tensile stress and increasing the film roughness properly, we fabricated Nb/Al-AlOx/Nb Josephson junctions with a high quality factor characterized by Rsg/RN(30 on average). The minimum size of junctions was 1 μm.
Fabrication And Characterization Of High-Quality Nb/Al-AlO
x/Nb Cross-Type Josephson Tunnel Junctions Utilising CMP-based Planarisation Techniques
Josephson tunnel junctions (JJs) are the fundamental building blocks of today's most advanced superconducting electronic components, such as qubits and superconducting quantum interference devices (SQUIDs). Given the ongoing demand for scalability of these devices on the wafer-scale, it is crucial to control the fabrication process as precisely as possible to ensure uniform quality and reproducibility. Today, window-type JJs are often used in the production of DC SQUIDs and while they are reliable and reproducible, they suffer from alignment inaccuracies caused by photolithography and unavoidable parasitic capacitances, thus limiting the energy sensitivity of DC SQUIDs. These problems can be circumvented by producing JJs with cross-type geometry, which allows for smaller junction areas and eliminates parasitic capacitances. Here we discuss the fabrication of Nb/Al-AlOx/Nb-based cross-type JJs, where the trilayer is embedded in sputter-deposited SiO
2 to allow for planarisation of the structures and to ensure the reliable insulation of the sidewalls of the bottom electrode. Instead of lift-off processes that require a lot of time and potentially leave unwanted wings along the edges of microstructures behind that might compromise subsequent layers, we use chemical-mechanical polishing (CMP) for the removal of excess SiO
2. This is not only much faster, but produces smooth and uniform surfaces, which in turn effectively improves the reliability of our JJ production process resulting in a high yield of over
90% on wafer-scale. In addition, we discuss the influence of fabrication details on the quality and electrical properties of our JJs with different junction areas down to
1μm×1μm distributed across the wafer and extract the junction specific quality parameters from their IV-characteristics and their Fraunhofer patterns.
We have developed a combined photolithography and electron-beam lithography fabrication process for sub-\mum to \mum-size Nb/Al-AlOx/Nb Josephson junctions. In order to define the junction size and protect its top electrode during anodic oxidation, we developed and used the new concept of an aluminum hard mask. Josephson junctions of sizes down to 0.5 \mum2 have been fabricated and thoroughly characterized. We found that they have a very high quality, which is witnessed by the IV curves with quality parameters Vm > 50 mV and Vgap = 2.8 mV at 4.2 K, as well as IcRN products of 1.75-1.93 mV obtained at lower temperatures. In order to test the usability of our fabrication process for superconducting quantum bits, we have also designed, fabricated and experimentally investigated phase qubits made of these junctions. We found a relaxation time of T1 = 26 ns and a dephasing time of T2 = 21 ns.