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IEEE Transactions on Applied Superconductivity

Multilayer HTS SFQ analog-to-digital converters

James D. McCambridge, Martin G. Forrester, Donald L. Miller, B. D. Hunt, John X. Pryzbysz, John Talvacchio, Robert M. Young

Published Jun 1, 1997• 22 citations
Publisher

Abstract

We have fabricated and measured high T/sub c/ superconductor single flux quantum 1-bit flux-counting analog-to-digital converters (ADCs). The ADCs were made with a multilayer all-epitaxial process which incorporates 10 edge SNS (superconductor-normal-superconductor) or step-edge grain boundary (SEGB) Josephson junctions with a YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// groundplane. The ADC consists of a quantizer connected to a Toggle flip-flop through a buffer-like stage. Direct readout of the flux state of the T flip-flop was made with a Read SQUID inductively coupled through a hole in the groundplane. The circuits were operated at 65 K and low speeds. The SNS circuits outperformed the SEGB circuits because of their higher readout voltages and tighter critical current spreads.

DOI
10.1109/77.622201

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We have fabricated and measured high T/sub c/ superconductor single flux quantum 1-bit flux-counting analog-to-digital converters (ADCs). The ADCs were made with a multilayer all-epitaxial process which incorporates 10 edge SNS (superconductor-normal-superconductor) or step-edge grain boundary (SEGB) Josephson junctions with a YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// groundplane. The ADC consists of a quantizer connected to a Toggle flip-flop through a buffer-like stage. Direct readout of the flux state of the T flip-flop was made with a Read SQUID inductively coupled through a hole in the groundplane. The circuits were operated at 65 K and low speeds. The SNS circuits outperformed the SEGB circuits because of their higher readout voltages and tighter critical current spreads.
The authors report the design, fabrication, and test results of single flux quantum (SFQ) toggle flip flop circuits. These circuits, investigated as building blocks of an HTS counting ADC, feature a directly coupled readout junction stack similar to those used in LTS RSFQ circuits. The directly coupled circuit delivers higher readout voltage, hence potentially higher operating speed than magnetically coupled alternatives. The circuits were fabricated using two multilayer HTS SNS junction integrated circuit technologies (one at Northrop Grumman and the other at TRW) featuring three YBCO depositions. Initial testing demonstrated toggling of a T-flip flop in response to SFQ pulses generated by integrated dc/SFQ converters. The readout voltage is shown to approach 40% of the junction I/sub C/R/sub N/ product, and as high as 100 /spl mu/V at 65K. Test results are compared with predicted fabrication process parameter requirements. To increase margins and tolerance to process parameter variations, improvements to the design have been made using JSpice and MALT.
We have developed the fabrication process, the circuit design technology, and the cryopackaging technology for high-Tc single flux quantum (SFQ) devices with the aim of application to an analog-to-digital (A/D) converter circuit for future wireless communication and a sampler system for high-speed measurements. Reproducibility of fabricating rampedge Josephson junctions with IcRn products above 1mV at 40K and small Ic spreads on a superconducting groundplane was much improved by employing smooth multilayer structures and optimizing the junction fabrication process. The separated base-electrode layout (SBL) method that suppresses the Jc spread for interface-modified junctions in circuits was developed. This method enabled low-frequency logic operations of various elementary SFQ circuits with relatively wide bias current margins and operation of a toggle-flip-flop (T-FF) above 200GHz at 40K. Operation of a 1:2 demultiplexer, one of main elements of a hybrid-type Σ-Δ A/D converter circuit, was also demonstrated. We developed a sampler system in which a sampler circuit with a potential bandwidth over 100GHz was cooled by a compact stirling cooler, and waveform observation experiments confirmed the actual system bandwidth well over 50GHz.
We have characterized Nb analog to digital converters using a resistor-coupled SFQ flip flop counter and a latching destructive readout (DRO). The counter used SFQ buffers between bits to provide isolation during destructive readout. We have measured parallel readout at sample rates up to 125 MSPS. We have also successfully operated an ADC which has Josephson junction regulated flip flop gate and readout bias busses. Using a self-resetting gate (SRG) at the carry out of the counter, we have measured the bit error rates (BER) of the counters. A two junction SQUID quantizer, biased in the voltage state, was used to produce correlated SFQ pulses at each junction. The SRG outputs of two 10 bit counters connected to the two quantizer outputs were compared. We measured a BER of /spl sim/5/spl times/10/sup -11/ with the quantizer operating at 19 GHz. We believe the principle error source is the latching SRG.
High speed, single flux quantum (SFQ) binary scalers are important components in superconducting analog-to-digital converters (ADC). This paper reviews the concept for a SQUID ADC and the design of an SFQ binary ripple counter, and reports the simulation of key components, and fabrication and performance of non-latching SQUID scalers and SFQ binary ripple counters. The SQUIDs were fabricated with Nb/Nb2O5/PbIn junctions and interconnected by monolithic-superconducting transmission lines and isolation resistors. Each SQUID functioned as a bistable flip-flop with the input connected to the center of the device and the output across one junction. All junctions were critically damped to optimize the pulse response. Operation was verified by observing the do I-V curves of successive SQUIDs driven by a cw pulse train generated on the same chip. Each SQUID exhibited constant-voltage current steps at 1/2 the voltage of the preceding device as expected from the Josephson voltage-to-frequency relation. Steps were observed only for the same voltage polarity of successive devices and for proper phase bias of the SQUID. Binary frequency division was recorded up to 40GHz for devices designed to operate to 28GHz.
We have developed a multilayer structure with a smooth surface and fabrication processes for HTS single-flux-quantum (SFQ) circuits. The multilayer structure with surface roughness Ra less than 2 nm, composed of a La0.2–Y0.9Ba1.9Cu3Ox ground plane and base electrode layer, and SrSnO3 insulating layers, was deposited by off-axis magnetron sputtering. We have fabricated interface-engineered junctions based on the multilayer structure using an La0.2–Yb0.9Ba1.9Cu3Ox counter-electrode layer prepared by pulsed laser deposition. The fabricated junctions exhibited excellent Josephson characteristics with a 1-σ spread in Ic as low as 8% for 1000 junctions. The sheet inductance values below 50 K were 0.8–1.0 pH per square. Operation of several elementary SFQ circuits including a toggle flip-flop, a confluence buffer, a set–reset flip-flop and other SFQ elements has been successfully demonstrated at 30–60 K.
Ultrafast switching speed, low power, natural quantization of magnetic flux, quantum accuracy, and low noise of cryogenic superconductor circuits enable fast and accurate data conversion between the analog and digital domains. Based on rapid single-flux quantum (RSFQ) logic, these integrated circuits are capable of achieving performance levels unattainable by any other technology. Two major classes of superconductor analog-to-digital converters (ADCs) are being developed - Nyquist sampling and oversampling converters. Complete systems with digital sampling at rates of /spl sim/20 GHz and above have been demonstrated using low-temperature superconductor device technology. Some ADC components have also been implemented using high-temperature superconductors. Superconductor ADCs have unique applications in true digital-RF communications, broadband instrumentation, and digital sensor readout. Their designs, test results, and future development trends are reviewed.