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arXiv:2305.07607 · Applied Physics Letters

High density fabrication process for single flux quantum circuits

Daniel T. Yohannes, Mario Renzullo, John A. Vivalda, A. C. Jacobs, Ming Yu, Jason Walter, A. F. Kirichenko, I. V. Vernik, Oleg A. Mukhanov

Published May 22, 2023• 17 citations
arXivHTMLPDF

Abstract

We implemented, optimized, and fully tested a superconducting Josephson junction fabrication process over multiple runs tailored for integrated digital circuits that are used for control and readout of superconducting qubits operating at millikelvin temperatures. This process was optimized for highly energy efficient rapid single flux quantum (ERSFQ) circuits with critical currents reduced by a factor of ∼10 as compared to those operated at 4.2 K. Specifically, it implemented Josephson junctions with 10 μA unit critical current fabricated with 10 μA/μm2 critical current density. In order to circumvent the substantial size increase in the SFQ circuit inductors, we employed an NbN high kinetic inductance layer with 8.5 pH/sq sheet inductance. Similarly, to maintain the small size of junction resistive shunts, we used a non-superconducting PdAu alloy with 4.0 Ω/sq sheet resistance. For integration with quantum circuits in a multi-chip module, 5 and 10 μm height bump processes were also optimized. To keep the fabrication process in check, we developed and thoroughly tested a comprehensive process control monitor chip set.

DOI
10.1063/5.0152552

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We implemented, optimized, and fully tested a superconducting Josephson junction fabrication process over multiple runs tailored for integrated digital circuits that are used for control and readout of superconducting qubits operating at millikelvin temperatures. This process was optimized for highly energy efficient rapid single flux quantum (ERSFQ) circuits with critical currents reduced by a factor of ∼10 as compared to those operated at 4.2 K. Specifically, it implemented Josephson junctions with 10 μA unit critical current fabricated with 10 μA/μm2 critical current density. In order to circumvent the substantial size increase in the SFQ circuit inductors, we employed an NbN high kinetic inductance layer with 8.5 pH/sq sheet inductance. Similarly, to maintain the small size of junction resistive shunts, we used a non-superconducting PdAu alloy with 4.0 Ω/sq sheet resistance. For integration with quantum circuits in a multi-chip module, 5 and 10 μm height bump processes were also optimized. To keep the fabrication process in check, we developed and thoroughly tested a comprehensive process control monitor chip set.
We developed a process for fabricating nitride superconductor-based superconducting qubits monolithically integrated with a single flux quantum (SFQ)-based readout and control circuits. Since we used a Josephson junction (JJ) made of an NbN/AlN/NbN tri-layer, including a critical current density (Jc) of 50 A/cm2as the suitable material for superconducting qubits and SFQ readout/control circuits operating at 20 mK, the JJs for both the qubits and the SFQ circuits could simultaneously be fabricated. The device structure was also composed of three superconductive layers, comprising two superconductive layers as wiring layers and other layers as the top ground plane. Then, we used a Pd film as the resistive layer, which is required as the shunt resistors and the bias resistors for the SFQ control circuits, followed by an investigation of the properties of NbN/AlN/NbN epitaxial junctions and evaluation of the sheet inductance of the base NbN and wiring NbTiN layer. Our results showed the successful fabrication of a JJ with a sufficiently low leakage current and aJcof around 50 A/cm2, which was close to the target value. Furthermore, the evaluated sheet inductance exceeded 1 pH, which was several times larger than the values obtained for Nb-integrated circuits.
As quantum computing processors increase in size, there is growing interest in developing cryogenic electronics to overcome significant challenges to system scaling. Single flux-quantum (SFQ) circuits offer a promising alternative to remote, bulky, and power-hungry room temperature electronics. To meet the need for digital qubit control, readout, and co-processing, SFQ circuits must be adapted to operate at millikelvin temperatures near quantum processors. SEEQC's SFQuClass digital quantum management approach proximally places energy-efficient SFQ (ERSFQ) circuits and qubits in a multi-chip module. This enables extremely low power dissipation, compatible with a typical dilution cryostat's limited cooling power, while maintaining high processing speed and low error rates. We report on systematic testing from 4 K to 10 mK of a comprehensive set of ERSFQ cells, as well as more complex circuits such as programmable counters and demultiplexers used in digital qubit control. We compare the operating margins and error rates of these circuits and find that, at millikelvin, bias margins decrease and the center of the margins (i.e., the optimal bias current value) increases by ~15%, compared to 4.2 K. The margins can be restored by thermal annealing by reducing Josephson junction (JJ) critical current Ic. To provide guidance for how circuit parameters vary from 4.2 K to millikelvin, relevant analog process control monitors (PCMs) were tested in the temperature range of interest. The measured JJ critical current (of the PCM JJ arrays) increases by ~15% when decreasing temperature from 4.2 K to millikelvin, in good agreement with both theory and the empirically measured change in the center of bias margins for the tested digital circuits.
We have developed a 6-kA/cm superconducting integrated circuit fabrication process toward large-scale single flux quantum digital circuits. To evaluate the process reliability and controllability, a set of process control monitors (PCMs) for monitoring fabrication and design parameters was designed and tested. Fabrication parameters, for example, film thicknesses and etched depths of the layers, were measured by testing specific patterns during fabrication. Design parameters such as the critical current density Jc, normal-state resistance Rnand actual sizes of Josephson junctions, the sheet resistance of Mo resistor Rsh, and the penetration depth of Nb films were evaluated by electrically characterizing PCM circuits after fabrication. We also monitored superconducting critical currents for vias and Nb lines, and insulation properties between the metal layers systematically.
We report low-power single-flux-quantum (SFQ) circuits fabricated with a lowered critical current density process and low-voltage design. We selected 250 A/cm2^{2}2to obtain 2–10 μA Josephson junctions (JJs) easily using conventional facilities. Our numerical simulation shows that the expected operating frequency is 10 GHz and that we can reduce the bias voltage to 0.1–0.5 mV; power consumption can be reduced to around 1 nW per JJ. We newly developed a fabrication process featuring four planarized Nb layers and a Pd resistor layer. We obtained the correct operation of several basic SFQ circuit elements designed with the lowered critical currents to 1/2 of the conventional circuits at 4.2 K. We also evaluated the Josephson junction critical currents, specific capacitance, resistance, and inductance at 3 K and 300 mK. We observed an increase of 7% in the critical currents at 300 mK, while the other parameters were unchanged. We demonstrated a 0.5-mV Josephson transmission line where we lowered the critical currents to 1/10. We expect such low-power SFQ circuits to operate at 20 mK, providing classical, general-purpose digital processing near quantum bits.
Abstract We review the existing fabrication processes for superconductor digital electronics and describe approaches to increasing the scale of integration of superconducting digital circuits from the current level of about one million Josephson junctions (JJs) on a 1-cm 2 chip toward ten million JJs per chip. We present designs of ac-clocked Single Flux Quantum (SFQ) shift registers, convenient benchmarking circuits, in a 250-nm-linewidth superconductor electronics fabrication process developed recently at MIT Lincoln Laboratory (MIT LL). For shift registers using resistively shunted JJs with Josephson critical current density, J c of 100 μA/μm 2 , we achieved a record-high circuit density of 4.2·10 6 JJs per cm 2 , a factor of three higher than the previous record obtained in the MIT LL 350-nm-linewidth SFQ5ee process. Using self-shunted JJs with J c of 600 μA/μm 2 , we increased this record circuit density to 7.4·10 6 JJs per cm 2 .
Superconducting single flux quantum (SFQ) technology is well known for digital logic operations below 4.2 K, which are compatible with the Josephson junction qubit. Operation speed and signal sensitivity of circuits in SFQ are also sufficient to control qubits. Therefore, the SFQ circuit is a candidate technology for multiple qubit control. However, the self-heating effect of the SFQ circuit is a potential barrier to development of an SFQ-supported multiple qubit system because the qubit operating temperature is lower than the conventional 4.2 K. The multi-chip approach is a possible solution because the qubit chip can be thermally isolated from the SFQ circuitry. We report on recent progress in SFQ circuit and packaging technology for operation at sub-Kelvin temperatures. As for multi-chip module technology, a test sample of the multi-chip module shows good reliability of electrical connections between chips, and each solder bump has a bandwidth wide enough for signal transmission. We have designed lower power SFQ circuits for sub-Kelvin temperatures. The critical currents of Josephson junctions were scaled down, inductances were scaled up, and bias voltage was reduced to make power consumption lower. Based on our fabrication technology, critical current densities were optimized by considering trade-off relations between fabrication availability and operation speed. We successfully confirmed its correct operations at around 0.35 K. The combination of the multi-chip module and optimized SFQ circuits is very effective way of controlling qubit.