We report the measurement results of the low-power single-flux-quantum (SFQ) circuits below 20 mK using a dilution refrigerator. We have been developing the SFQ circuits using a lowered critical current density process (250 A/cm2) and low-voltage design (0.1–0.5 mV) toward digital signal processing near superconductor quantum bits. So far, we have designed several basic SFQ cells, including wiring elements, flip-flops, and logic gates, using the four Nb planarized layer process and obtained the correct operation at 300 mK. In this study, we tested several SFQ circuits aiming to evaluate the operation at the mixing chamber stage of a dilution refrigerator. Our experimental results show that there was almost no change of device parameters, such as critical current values of Josephson junctions, or operating margins of the basic cells between 300 mK and 16 mK.
Superconductor single-flux-quantum (SFQ) integrated circuits can provide classical, general-purpose digital processing at cryogenic temperature near quantum bits. We report high-frequency operation of low-power SFQ circuits using a lowered critical current density fabrication process and low-voltage design. We are developing a standard-cell library with integrated devices featuring four planarized Nb layers and a Pd resistor layer. SFQ shift registers successfully operated at up to 11 GHz at 0.3 K. The measured operating frequency is sufficient for SFQ-based digital controlling of quantum bits using impulse-shaped voltage pulses.
Low-Power Single-Flux-Quantum Standard Cell Library Using 250 A/cm
2 Process for Qubit Control Applications
In this paper, we report the development of a low-power single-flux-quantum (SFQ) standard cell library and experimental results, including the cell design, high-speed test of shift-registers, delay measurement using ring oscillators, and demonstration of simple demultiplexers. We fabricated the SFQ circuits using a lowered critical current density (250 A/cm
2) process and low-voltage design (0.5 or 0.1 mV). We reduced the power consumption to 1/50 or 1/250 from the conventional SFQ circuits operating at 4.2 K. We designed several essential SFQ cells, including wiring elements, flip-flops, and logic gates with the fabrication process using four planarized Nb layers and obtained the correct operation at 0.3 K. We tested 8-bit shift-registers aiming to evaluate the operating frequency of the developed SFQ cells. The 0.1-mV shift-registers operated up to 8.5 GHz. The experimental results of ring oscillators showed good agreement with the analog circuit simulation results. We believe that our experimentally-verified standard cell library is ready to use for SFQ-based digital control of qubits, such as demultiplexing of control signals, and the timing information and power consumption will be valuable information as the baseline to discuss future scalable quantum computer systems.
We report successful operations of low-energy consumption rapid single-flux-quantum (RSFQ) circuits applying lowered driving voltages, called LV-RSFQ, using different fabrication processes. In the LV-RSFQ, we feed bias currents to Josephson junctions from lowered constant voltages (less than 1 mV) through small resistors without extra inductors. Both static and dynamic energy consumption are reduced because of suppression of amplitudes of SFQ pulses, in exchange for slower switching speed. We show that the switching speed in LV-RSFQ circuits is improved by increasing critical current density of Josephson junctions. We demonstrated high-speed operations of LV-RSFQ shift registers in a range of 5-40 GHz and 15-90 GHz using the 2.5-kA/cm2and 10-kA/cm2fabrication technologies, respectively. Comparison of the experimental results of the LV-RSFQ circuits fabricated using two different technologies derives the optimum bias voltage in terms of energy-delay product ranged from 0.1 to 1.0ICRS, whereICRSis the product of Josephson critical current and shunt resistance.
In this study, the trade-off among power consumptions, operating frequencies, and error rates in low-power single-flux-quantum (SFQ) circuit is investigated. The power consumption of SFQ circuits can be reduced by the lowering critical currents (
Icvalues) of the Josephson junctions (JJs), or the bias voltage (
Vb). The shifts and spreads of timing parameter fluctuations when
Icand
Vbwere lowered were numerically analyzed, with consideration of thermal noise at 4.2 K. The timing behaviors after
Icwas lowered were relatively simple, being based on the signal-to-noise ratio, whereas those for lowered
Vbvalues were complicated because of the dynamic behaviors of JJs driven at reduced voltage. The simulation results imply that the operating frequencies decreased because the timing windows narrowed, but the highest energy efficiency was obtained when we lowered
Icor
Vbto 6.25% of their conventional values, and the energy reduction after lowering of
Vbwas 26% better than that after lowering of
Ic. Moreover, if a small error rate (for example
10−6) is acceptable, further improvement in energy efficiency would be expected at significantly higher clock frequencies than would be the case if the SFQ circuit must exhibit error-free operation.
We designed and fabricated rapid single-flux-quantum (RSFQ) circuits using a new 20-kA/cm2process based on conventional Nb/AlOx/Nb Josephson junction (JJ) technology. Circular JJs were fabricated to improve their uniformity. They had sufficiently low spread of the critical currents for large-scale RSFQ circuits. We selected the circuit design parameters carefully, including the bias voltage and McCumber-Stewart parameter, balancing the energy consumption, switching speeds, margins, and integration density. We demonstrated several logic gates and shift registers at a clock frequency of 154 GHz with the designed bias voltage of 2.5 mV, and demonstrated energy-efficient shift registers using the low-voltage RSFQ (LV-RSFQ) technique at 83 GHz.