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IEEE Transactions on Applied Superconductivity

Single Flux Quantum Circuit and Packaging Technology for Sub-Kelvin Temperature Operation

Shinichi Yorozu, Toshiyuki Miyazaki, Vasili K. Semenov, M. Hidaka, J. S. Tsai

Published Jun 1, 2007• 6 citations
Publisher

Abstract

Superconducting single flux quantum (SFQ) technology is well known for digital logic operations below 4.2 K, which are compatible with the Josephson junction qubit. Operation speed and signal sensitivity of circuits in SFQ are also sufficient to control qubits. Therefore, the SFQ circuit is a candidate technology for multiple qubit control. However, the self-heating effect of the SFQ circuit is a potential barrier to development of an SFQ-supported multiple qubit system because the qubit operating temperature is lower than the conventional 4.2 K. The multi-chip approach is a possible solution because the qubit chip can be thermally isolated from the SFQ circuitry. We report on recent progress in SFQ circuit and packaging technology for operation at sub-Kelvin temperatures. As for multi-chip module technology, a test sample of the multi-chip module shows good reliability of electrical connections between chips, and each solder bump has a bandwidth wide enough for signal transmission. We have designed lower power SFQ circuits for sub-Kelvin temperatures. The critical currents of Josephson junctions were scaled down, inductances were scaled up, and bias voltage was reduced to make power consumption lower. Based on our fabrication technology, critical current densities were optimized by considering trade-off relations between fabrication availability and operation speed. We successfully confirmed its correct operations at around 0.35 K. The combination of the multi-chip module and optimized SFQ circuits is very effective way of controlling qubit.

DOI
10.1109/tasc.2007.898659

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IEEE Transactions on Applied Superconductivity•Jun 1, 2007•1 citation
Superconducting single flux quantum (SFQ) technology is well known for digital logic operations below 4.2 K, which are compatible with the Josephson junction qubit. Operation speed and signal sensitivity of circuits in SFQ are also sufficient to control qubits. Therefore, the SFQ circuit is a candidate technology for multiple qubit control. However, the self-heating effect of the SFQ circuit is a potential barrier to development of an SFQ-supported multiple qubit system because the qubit operating temperature is lower than the conventional 4.2 K. The multi-chip approach is a possible solution because the qubit chip can be thermally isolated from the SFQ circuitry. We report on recent progress in SFQ circuit and packaging technology for operation at sub-Kelvin temperatures. As for multi-chip module technology, a test sample of the multi-chip module shows good reliability of electrical connections between chips, and each solder bump has a bandwidth wide enough for signal transmission. We have designed lower power SFQ circuits for sub-Kelvin temperatures. The critical currents of Josephson junctions were scaled down, inductances were scaled up, and bias voltage was reduced to make power consumption lower. Based on our fabrication technology, critical current densities were optimized by considering trade-off relations between fabrication availability and operation speed. We successfully confirmed its correct operations at around 0.35 K. The combination of the multi-chip module and optimized SFQ circuits is very effective way of controlling qubit.
Superconducting single flux quantum (SFQ) circuit can operate at very low temperature. This is suitable for controlling a quantum computing system with Josephson junctions. However, it is difficult to integrate both SFQ circuits and qubits into a single-chip, because of the dissipative characteristics of SFQ circuits. Therefore, we have developed a multi-chip packaging technology for a qubit control module. The module consists of SFQ circuit chips, qubit chips, and a substrate all of which are fabricated with Nb and Al technology. The chips are flip-chip bonded with superconducting solder bumps. We also investigated SFQ control circuits for superconducting qubits and circuit parameter optimization for sub-Kelvin temperature operation. Using both multi-chip packaging and optimized SFQ control circuit makes the design of qubit control module more flexible.
As quantum computing processors increase in size, there is growing interest in developing cryogenic electronics to overcome significant challenges to system scaling. Single flux-quantum (SFQ) circuits offer a promising alternative to remote, bulky, and power-hungry room temperature electronics. To meet the need for digital qubit control, readout, and co-processing, SFQ circuits must be adapted to operate at millikelvin temperatures near quantum processors. SEEQC's SFQuClass digital quantum management approach proximally places energy-efficient SFQ (ERSFQ) circuits and qubits in a multi-chip module. This enables extremely low power dissipation, compatible with a typical dilution cryostat's limited cooling power, while maintaining high processing speed and low error rates. We report on systematic testing from 4 K to 10 mK of a comprehensive set of ERSFQ cells, as well as more complex circuits such as programmable counters and demultiplexers used in digital qubit control. We compare the operating margins and error rates of these circuits and find that, at millikelvin, bias margins decrease and the center of the margins (i.e., the optimal bias current value) increases by ~15%, compared to 4.2 K. The margins can be restored by thermal annealing by reducing Josephson junction (JJ) critical current Ic. To provide guidance for how circuit parameters vary from 4.2 K to millikelvin, relevant analog process control monitors (PCMs) were tested in the temperature range of interest. The measured JJ critical current (of the PCM JJ arrays) increases by ~15% when decreasing temperature from 4.2 K to millikelvin, in good agreement with both theory and the empirically measured change in the center of bias margins for the tested digital circuits.
Superconducting digital logic technology, Rapid Single Flux Quantum (RSFQ), is established as the fastest technology in microelectronics based on Josephson junction devices. Technological challenges in large scale integration of superconductor circuits (RSFQ) namely: flux trapping, low power dissipation and multi-chip modules are addressed here. One of the main limitations of the integration of the RSFQ circuits is flux trapping, which arises due to the presence of residual magnetic field during transition of the circuit into superconducting state. Flux trapping is an unusual problem specific in only superconducting circuits. The effect of flux trapping in RSFQ circuits is studied, with a controlled 3-D magnetic field setup, quantitatively. Layout configuration with different moat patterns making RSFQ circuits tolerant to external magnetic field up-to 20mG was also developed. Low power issue was addressed by developing a new logic family. Power independent logic, an improved form of RSFQ logic, enables the circuits to operate only when needed and circuits can be switched off the remaining time; thereby eliminating static power consumption by retaining the logic state of the circuit. Flux trapping has also beeninvestigated in power independent cells. Current recycling is a technique to reduce the bias current applied for the operation of the RSFQ circuits. In this technique the cells are biased by serial connections. The reduction in supply current is proportional to number of blocks connected in series The effect of magnetic field on the operating margins of the current recycling circuits has also been studied. Operation of Multi-chip modules, one of the most viable solutions to develop large scale circuits, was demonstrated. Multi-chip modules with lithographically designed bumps is presented where data transmission rate between two superconducting chips exceed 100GHz. Finally, the development of the multi-modulator ADC for low noisefront end under-development is discussed.
We report low-power single-flux-quantum (SFQ) circuits fabricated with a lowered critical current density process and low-voltage design. We selected 250 A/cm2^{2}2to obtain 2–10 μA Josephson junctions (JJs) easily using conventional facilities. Our numerical simulation shows that the expected operating frequency is 10 GHz and that we can reduce the bias voltage to 0.1–0.5 mV; power consumption can be reduced to around 1 nW per JJ. We newly developed a fabrication process featuring four planarized Nb layers and a Pd resistor layer. We obtained the correct operation of several basic SFQ circuit elements designed with the lowered critical currents to 1/2 of the conventional circuits at 4.2 K. We also evaluated the Josephson junction critical currents, specific capacitance, resistance, and inductance at 3 K and 300 mK. We observed an increase of 7% in the critical currents at 300 mK, while the other parameters were unchanged. We demonstrated a 0.5-mV Josephson transmission line where we lowered the critical currents to 1/10. We expect such low-power SFQ circuits to operate at 20 mK, providing classical, general-purpose digital processing near quantum bits.
We implemented, optimized, and fully tested a superconducting Josephson junction fabrication process over multiple runs tailored for integrated digital circuits that are used for control and readout of superconducting qubits operating at millikelvin temperatures. This process was optimized for highly energy efficient rapid single flux quantum (ERSFQ) circuits with critical currents reduced by a factor of ∼10 as compared to those operated at 4.2 K. Specifically, it implemented Josephson junctions with 10 μA unit critical current fabricated with 10 μA/μm2 critical current density. In order to circumvent the substantial size increase in the SFQ circuit inductors, we employed an NbN high kinetic inductance layer with 8.5 pH/sq sheet inductance. Similarly, to maintain the small size of junction resistive shunts, we used a non-superconducting PdAu alloy with 4.0 Ω/sq sheet resistance. For integration with quantum circuits in a multi-chip module, 5 and 10 μm height bump processes were also optimized. To keep the fabrication process in check, we developed and thoroughly tested a comprehensive process control monitor chip set.
We developed a multi-chip module (MCM) system of superconducting quantum bits with single-flux quantum (SFQ) interface circuits. The MCM system consists of chips with quantum bits and chips with SFQ circuits mounted on a base chip by flip-chip bonding (FCB) with superconducting solder. We report on a reliability test of the MCM system. The test was done using a resistance measurement of an MCM with 30 mum diameter bumps. Tested samples showed good durability against thermal cycles between room temperature and 4.2 K. At 4.2 K, the resistance measured through more than two hundred bumps in a series was less than 1 mOmega. Along with achieving a high reliability, reducing thermal interference from SFQ circuits to quantum bits is important. We must understand the thermal conductance between and within the chips to design a system with minimum interference. An MCM on-chip thermometer which is based on the Johnson noise thermometry, has been designed and fabricated to achieve this desired level. The preliminary results of the thermal measurement are reported.