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Latency-constrained Fidelity Optimization for NISQ Execution via Quantum Circuit Knitting

Matteo Mendula, Deborah Volpe, G. A. Massa, Fabrizio Riente, Giovanna Turvani, C. F. Chiasserini

Published Jan 1, 2026• 0 citations
OpenAlex

Abstract

Executing quantum circuits on NISQ devices poses challenges due to noise, decoherence, and limited qubit counts. Circuit Knitting (CK) allows solving these issues by breaking down large circuits into smaller sub-circuits. However, the subsequent reconstruction adds sampling and processing time. Quantum Error Mitigation (QEM) can enhance output quality, but it also raises execution costs. To address the above issues, we introduce MOSAIQ, a cost-aware framework optimizing both circuit partitioning and error mitigation for reliable NISQ execution. MOSAIQ uses calibration-driven noise estimation, mitigation-aware fidelity modeling, and cut-dependent recon- struction costs to choose partitioning strategies that balance end- to-end fidelity with practical feasibility. We define the problem as an optimization task and test the MOSAIQ on noisy simulators and actual quantum HW. Results indicate that MOSAIQ prevents overly aggressive partitioning and improves the balance between fidelity, sampling overhead, and execution time.

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Executing quantum circuits on NISQ devices poses challenges due to noise, decoherence, and limited qubit counts. Circuit Knitting (CK) allows solving these issues by breaking down large circuits into smaller sub-circuits. However, the subsequent reconstruction adds sampling and processing time. Quantum Error Mitigation (QEM) can enhance output quality, but it also raises execution costs. To address the above issues, we introduce MOSAIQ, a cost-aware framework optimizing both circuit partitioning and error mitigation for reliable NISQ execution. MOSAIQ uses calibration-driven noise estimation, mitigation-aware fidelity modeling, and cut-dependent recon- struction costs to choose partitioning strategies that balance end- to-end fidelity with practical feasibility. We define the problem as an optimization task and test the MOSAIQ on noisy simulators and actual quantum HW. Results indicate that MOSAIQ prevents overly aggressive partitioning and improves the balance between fidelity, sampling overhead, and execution time.
Executing quantum circuits on current quantum Best Cut Identification devices is fundamentally limited by noise, decoherence, and hardware constraints. Circuit Knitting (CK) techniques enable the execution of larger circuits by decomposing them into smaller sub-circuits, at the cost of reconstruction overhead. At the same time, Quantum Error Mitigation (QEM) methods improve fidelity but introduce additional complexity. In this work, we propose a fidelity-aware framework that jointly optimizes circuit partitioning and error mitigation to maximize end-to-end execution fidelity. We introduce a unified model that captures the trade-off between sub-circuit operational fidelity, reconstruction penalties induced by cuts, and the impact of error mitigation. Based on this model, we formulate the cut placement problem as an optimization task and solve it to identify fidelity-optimal partitioning strategies accounting for error mitigation and under realistic hardware constraints. Notably, our framework integrates calibration-driven noise models and supports practical fidelity estimation using backend-specific parameters. We validate the proposed method on both noisy simulators (IBM Fake Backends) and real quantum hardware (IQM Lagrange), proving consistent improvements in execution fidelity with gains of up to 40% over standard circuit execution.
Quantum algorithms offer an exponential speedup over classical algorithms for a range of computational problems. The fundamental mechanisms underlying quantum computation required the development and construction of quantum computers. These devices are referred to as NISQ (Noisy Intermediate-Scale Quantum) devices. Not only are NISQ devices extremely limited in their qubit count but they also suffer from noise during computation and this problem only gets worse as the size of the circuit increases which limits the practical use of quantum computers for modern day applications. This paper will focus on utilizing quantum circuit partitioning to overcome the inherent issues of NISQ devices. Partitioning a quantum circuit into smaller subcircuits has allowed for the execution of quantum circuits that are too large to fit on one quantum device. There have been many previous approaches to quantum circuit partitioning and each of these approaches differ in how they work with some focusing on hardware-aware partitioning, optimal graph-based partitioning, multi-processor architectures and many more. These approaches achieve success in their objective but they often fail to scale well which impacts cost and noise. The ultimate goal of this paper is to mitigate these issues by minimizing 3 important metrics; noise, time and cost. To achieve this we use dynamic partitioning for practical circuit cutting and we take advantage of the benefits of hybrid execution where classical computation will be used alongside quantum hardware. This approach has proved to be beneficial with respect to noise with classical execution enabling a 42.30% reduction in noise and a 40% reduction in the number of qubits required in cases where a mixture of classical and quantum computation were required.
Circuit knitting emerges as a promising technique to overcome the limitation of the few physical qubits in near-term quantum hardware by cutting large quantum circuits into smaller subcircuits. Recent research in this area has been primarily oriented towards reducing subcircuit sampling overhead. Unfortunately, these works neglect hardware information during circuit cutting, thus posing significant challenges to the follow on stages. In fact, direct compilation and execution of these partitioned subcircuits yields low-fidelity results, highlighting the need for a more holistic optimization strategy.
Reliably executing quantum algorithms on noisy intermediate-scale quantum (NISQ) devices is challenging, as they are severely constrained and prone to errors. Efficient quantum circuit compilation techniques are therefore crucial for overcoming their limitations and dealing with their high error rates. These techniques consider the quantum hardware restrictions, such as the limited qubit connectivity, and perform some transformations to the original circuit that can be executed on a given quantum processor. Certain compilation methods use error information based on calibration data to further improve the success probability or the fidelity of the circuit to be run. However, it is uncertain to what extent incorporating calibration information in the compilation process can enhance the circuit performance. For instance, considering the most recent error data provided by vendors after calibrating the processor might not be functional enough as quantum systems are subject to drift, making the latest calibration data obsolete within minutes. In this paper, we explore how different usage of calibration data impacts the circuit fidelity, by using several compilation techniques and quantum processors (IBM Perth and Brisbane). To this aim, we implemented a framework that incorporates some of the state-of-the-art noise-aware and non-noise-aware compilation techniques and allows the user to perform fair comparisons under similar processor conditions. Our experiments yield valuable insights into the effects of noise-aware methodologies and the employment of calibration data. The main finding is that pre-processing historical calibration data can improve fidelity when real-time calibration data is not available due to factors such as cloud service latency and waiting queues between compilation and execution on the quantum backend.
Quantum computing is performed on Noisy Intermediate-Scale Quantum (NISQ) hardware in the short term. Only small circuits can be executed reliably on a quantum machine due to the unavoidable noisy quantum operations on NISQ devices, leading to the under-utilization of hardware resources. With the growing demand to access quantum hardware, how to utilize it more efficiently while maintaining output fidelity is becoming a timely issue. A parallel circuit execution technique has been proposed to address this problem by executing multiple programs on hardware simultaneously. It can improve the hardware throughput and reduce the overall runtime. However, accumulative noises such as crosstalk can decrease the output fidelity in parallel workload execution. In this paper, we first give an in-depth overview of state-of-the-art parallel circuit execution methods. Second, we propose a Quantum Crosstalk-aware Parallel workload execution method (QuCP) without the overhead of crosstalk characterization. Third, we investigate the trade-off between hardware throughput and fidelity loss to explore the hardware limitation with parallel circuit execution. Finally, we apply parallel circuit execution to VQE and zero-noise extrapolation error mitigation method to showcase its various applications on advancing NISQ computing.
This work presents a routing-aware pruning strategy for quantum circuits executed on Noisy Intermediate-Scale Quantum (NISQ) devices. We propose a method to remove parametric controlled rotations whose small rotation angles do not justify the routing overhead required for their implementation. By selectively pruning such gates, the method mitigates fidelity loss arising from additional SWAP operations introduced during compilation. Our approach evaluates whether executing a gate leads to greater fidelity loss than omitting it. Simulations on benchmark circuits with realistic noise models show that the method reduces two-qubit gate counts (up to 48.6%) while improving final state fidelity (up to 47.7%), especially for larger circuits where routing costs dominate.