RFSoCs are gaining adoption in many labs for quantum control systems thanks to their compactness and affordability. Making full use of the many components on an RFSoC evaluation board is a challenging engineering problem that must be solved to realize scalable control systems. In this dissertation, I evaluate the performance of various RFSoC components in the context of quantum information science. I present two custom FPGA engines that accelerate and parallelize arbitrary waveform generation. The first engine can be instantiated many times to power low-speed DACs for ion-shuttling trap electrodes. The second engine synthesizes CPMG-XY8n dynamical decoupling pulse sequences on the fly with 203.4ps precision. Both engines consume significantly fewer FPGA resources than conventional alternatives and greatly improve RFSoC viability for quantum control systems.
RFSoCs are gaining adoption in many labs for quantum control systems thanks to their compactness and affordability. Making full use of the many components on an RFSoC evaluation board is a challenging engineering problem that must be solved to realize scalable control systems. In this dissertation, I evaluate the performance of various RFSoC components in the context of quantum information science. I present two custom FPGA engines that accelerate and parallelize arbitrary waveform generation. The first engine can be instantiated many times to power low-speed DACs for ion-shuttling trap electrodes. The second engine synthesizes CPMG-XY8n dynamical decoupling pulse sequences on the fly with 203.4ps precision. Both engines consume significantly fewer FPGA resources than conventional alternatives and greatly improve RFSoC viability for quantum control systems.
Arbitrary Waveform Generators (AWGs) have widespread applications in telecommunications, quantum computing, and biomedical engineering, among others, due to their ability to generate a wide range of waveforms precisely and instantaneously. This work focuses on developing a scalable and energy-efficient AWG for qubit control. A simple methodology for bringing up a Radio-Frequency System-on-Chip (RFSoC) board and using it to generate various arbitrary waveforms has been discussed. A software-hardware codesign paradigm has been used in this work to dynamically control the output frequency, voltage and shape of the arbitrary waveforms. Similarly, the on-the-fly programmability of four Digital to Analog convertor (DAC) channels and four Analog to Digital Converter (ADC) channels have been tested. The voltage and frequency response of the DAC output has also been characterised to better understand the limitations of the RFSoC. The DAC-ADC loopback characterisation was also performed to prepare the RFSoC for qubit state readout measurements. Over the last few decades, the Direct Digital Synthesiser (DDS) has been a popular choice for generating specific waveforms, such as sinusoidal and ramp waveforms, due to its low cost, simple design, and high precision. Several prior-art works were surveyed, and the trade-offs and strengths of each architecture were summarised. A benchmarking table is prepared based on the Power, Performance and Area (PPA) analysis to make design selection easier for DDS designers. Two Figure of Merit definitions and scaling equations have also been used to normalise the specifications to a target process node (28 nm CMOS), to provide a more accurate comparison among state-of-the-art DDS designs on Application Specific Integrated Circuits (ASICs), and to set expectations for future architectural advancements in DDS design. Finally, a viable DDS-based AWG architecture for ASIC implementation has also been proposed based on the benchmarking.
Advanced quantum physics experiments place strict demands on control electronics, including phase-coherent multichannel RF/microwave generation, precise timing synchronization, low-latency response, and simultaneous support for wideband and near-DC signal processing. Existing control platforms often face trade-offs between channel count, integration level, and real-time performance, limiting scalability and experimental flexibility. In this work, we present a highly integrated real-time control system based on an XCZU49DR RFSoC. The platform integrates up to 16 RF DAC channels (9.85 GSa/s) and 16 RF ADC channels (2.5GSa/s) on a single chip, enabling synchronous multichannel signal generation and acquisition with deterministic timing. A custom RF front-end supports both broadband RF operation and low-frequency signal conditioning, while on-chip digital up/down conversion and programmable logic enable flexible waveform synthesis and real-time data processing. Performance characterization shows clean RF and microwave generation with spurious components suppressed below −59.0dBm at 200MHz and below −62.6dBm at 2.9GHz, while phase noise reaches −120.0dBc/Hz and −96.9dBc/Hz at 1kHz offset for 200MHz and 2.9GHz carriers, respectively, confirming low-noise and phase-coherent operation over a wide frequency range. The proposed platform provides a compact, scalable, and reconfigurable solution for quantum control and precision measurement. It is currently being applied to experiments involving NV centers and trapped ions, and can be readily adapted to other quantum systems, offering a practical foundation for next-generation
Quantum control processors (QCPs) bridge the gap between the quantum software and the hardware backend to construct full-stack quantum computers. In this study, the quantum backend interface is responsible for generating pulses to control qubits, where commercial waveform generators or specific converters are typically needed. A radio frequency system-on-chip (RFSoC)-based QCP supports a direct control pulse synthesis without additional components. Therefore, in this work, we propose an RFSoC-based QCP that integrates the processor and pulse generation logic onto a single board. With the help of the proposed instruction set and efficient microarchitecture implementation, the QCP offers large scalability for controllable qubits, while supporting different physical platforms.
This paper reports the development of a low-latency arbitrary waveform generator (AWG), which is suitable for the control and measurement of superconducting quantum computers. It can generate qubit control signals and measurement signals in real time. Compared with commercial AWG, our AWG has less latency and higher analog bandwidth. Compressing latency can reduce system feedback time, and higher analog bandwidth improves the system's integration by mounting more qubits on the readout line. The AWG integrates four high-speed digital-to-analog converters (DACs), phase-locked loop (PLL) circuits, field-programmable gate arrays (FPGAs), and related circuits into a standard PXI 3U board. The waveform generator module, communication interface module, clock module, and configuration module are realized utilizing the FPGA. The FPGA-based hardware architecture enables AWG to be flexibly configured to meet the various needs of quantum experiments. The four-channel AWG has a 2-GSa/s sampling rate, a 14-bit resolution, and 500 MHz bandwidth. The jitter in the AWG output waveform is approximately 3 ps; the latency of the AWG (the time from the feedback trigger received until a feedback pulse is generated) is approximately 55 ns. These designs form the basis of realizing control system for large-scale quantum computing.
This thesis presents the development of a superconducting qubit control and readout system based on FPGA technology, with a focus on the design of a pulse sequencer and the integration of frequency-multiplexed control. The system leverages the Quantum Instrumentation Control Kit (QICK), an open-source Xilinx RFSoC-based platform capable of direct digital synthesis and acquisition of microwave signals up to 10 GHz. The QICK firmware was extended to support the simultaneous generation and readout of multiple frequency-multiplexed tones, enabling the control and measurement of several qubits coupled to a shared feedline. This approach optimizes the number of controllable qubits relative to the available ADC and DAC resources on the RFSoC 4x2 board. Furthermore, this work includes the development of Qubase, a Python-based pulse sequencer that allows users to easily define and execute complex sequences of control and measurement pulses through the QICK Python interface. The resulting architecture is both flexible and scalable, providing a foundation for efficient multi-qubit experiments and enabling advanced techniques such as quantum error correction and real-time feedback.
Quantum processing units (QPUs) require precise tuning and continuous monitoring systems to be in a functional state, including stable frequency calibration and low-latency control respecting hardware timing constraints. Such systems, however, are complex, making QPUs less appealing and out of reach for many researchers and those without specialized RF/FPGA expertise. We give a brief review of Ramsey spectroscopy, the methodology used for sensitive qubit monitoring, and use QubiC 2.0’s clock-accurate simulation architecture to bridge this gap by validating pulse programs and parameter sweeps in silico before hardware bring-up. This establishes the cornerstone for future work involving hardware-in-the-loop applications where the QPU environment is simulated to work in conjunction with a high-speed DAC/ADC RFSoC FPGA setup, enabling prototyping and real-time calibration while preserving reproducibility.