In this study, the trade-off among power consumptions, operating frequencies, and error rates in low-power single-flux-quantum (SFQ) circuit is investigated. The power consumption of SFQ circuits can be reduced by the lowering critical currents (
Icvalues) of the Josephson junctions (JJs), or the bias voltage (
Vb). The shifts and spreads of timing parameter fluctuations when
Icand
Vbwere lowered were numerically analyzed, with consideration of thermal noise at 4.2 K. The timing behaviors after
Icwas lowered were relatively simple, being based on the signal-to-noise ratio, whereas those for lowered
Vbvalues were complicated because of the dynamic behaviors of JJs driven at reduced voltage. The simulation results imply that the operating frequencies decreased because the timing windows narrowed, but the highest energy efficiency was obtained when we lowered
Icor
Vbto 6.25% of their conventional values, and the energy reduction after lowering of
Vbwas 26% better than that after lowering of
Ic. Moreover, if a small error rate (for example
10−6) is acceptable, further improvement in energy efficiency would be expected at significantly higher clock frequencies than would be the case if the SFQ circuit must exhibit error-free operation.
We report low-power single-flux-quantum (SFQ) circuits fabricated with a lowered critical current density process and low-voltage design. We selected 250 A/cm
2to obtain 2–10 μA Josephson junctions (JJs) easily using conventional facilities. Our numerical simulation shows that the expected operating frequency is 10 GHz and that we can reduce the bias voltage to 0.1–0.5 mV; power consumption can be reduced to around 1 nW per JJ. We newly developed a fabrication process featuring four planarized Nb layers and a Pd resistor layer. We obtained the correct operation of several basic SFQ circuit elements designed with the lowered critical currents to 1/2 of the conventional circuits at 4.2 K. We also evaluated the Josephson junction critical currents, specific capacitance, resistance, and inductance at 3 K and 300 mK. We observed an increase of 7% in the critical currents at 300 mK, while the other parameters were unchanged. We demonstrated a 0.5-mV Josephson transmission line where we lowered the critical currents to 1/10. We expect such low-power SFQ circuits to operate at 20 mK, providing classical, general-purpose digital processing near quantum bits.
We demonstrate rapid single-flux-quantum (RSFQ) circuits with reduced energy consumption by lowering the driving voltages and critical currents of Josephson junctions (JJs). At lowered voltages, the energy statically consumed by bias resistors (which is dominant in RSFQ circuits) is reduced. In addition, we show that when RSFQ circuits are driven by lowered constant voltages, the dynamic energy consumption resulting from the switching of JJs is reduced because of the suppression of the amplitudes of the signal voltage pulses, even though the switching speed becomes slower. Utilization of miniaturized JJs with smaller critical currents also leads to the reduction of static and dynamic energy consumption without decreasing the switching speed. We have designed and tested ultra-low-energy 8-bit shift registers, and verified the correctness of high-speed operations up to 18 GHz. The average energy consumption, including that at the bias resistors, was measured at 4.0 aJ/bit, which represents an energy efficiency two orders of magnitude better than that of standard RSFQ circuits.