We demonstrate rapid single-flux-quantum (RSFQ) circuits with reduced energy consumption by lowering the driving voltages and critical currents of Josephson junctions (JJs). At lowered voltages, the energy statically consumed by bias resistors (which is dominant in RSFQ circuits) is reduced. In addition, we show that when RSFQ circuits are driven by lowered constant voltages, the dynamic energy consumption resulting from the switching of JJs is reduced because of the suppression of the amplitudes of the signal voltage pulses, even though the switching speed becomes slower. Utilization of miniaturized JJs with smaller critical currents also leads to the reduction of static and dynamic energy consumption without decreasing the switching speed. We have designed and tested ultra-low-energy 8-bit shift registers, and verified the correctness of high-speed operations up to 18 GHz. The average energy consumption, including that at the bias resistors, was measured at 4.0 aJ/bit, which represents an energy efficiency two orders of magnitude better than that of standard RSFQ circuits.
We report successful operations of low-energy consumption rapid single-flux-quantum (RSFQ) circuits applying lowered driving voltages, called LV-RSFQ, using different fabrication processes. In the LV-RSFQ, we feed bias currents to Josephson junctions from lowered constant voltages (less than 1 mV) through small resistors without extra inductors. Both static and dynamic energy consumption are reduced because of suppression of amplitudes of SFQ pulses, in exchange for slower switching speed. We show that the switching speed in LV-RSFQ circuits is improved by increasing critical current density of Josephson junctions. We demonstrated high-speed operations of LV-RSFQ shift registers in a range of 5-40 GHz and 15-90 GHz using the 2.5-kA/cm2and 10-kA/cm2fabrication technologies, respectively. Comparison of the experimental results of the LV-RSFQ circuits fabricated using two different technologies derives the optimum bias voltage in terms of energy-delay product ranged from 0.1 to 1.0ICRS, whereICRSis the product of Josephson critical current and shunt resistance.
We report energy reduction in low-voltage rapid single-flux-quantum (LV-RSFQ) circuits using shunt-resistor-free Josephson junctions. The LV-RSFQ logic is one of energy-efficient derivatives of rapid single-flux-quantum (RSFQ) logic, which operates in a constant voltage mode. By lowering bias voltages, we can reduce power consumption at bias resistors which account for more than 90% of total power consumption, and also reduce the energy dynamically consumed during switching events because of slower transition of superconductor phase. Voltage drops across Josephson junctions cause a complicated trade-off between operation speed and power consumption. In this paper, we evaluated shunt-resistor-free LV-RSFQ shift-registers in terms of operation speed, power consumption, and energy-efficiency. Numerical simulation revealed their faster operation by up to 50% and accordingly higher energy-efficiency. Experimental results showed that a 0.5mV shift-register had superiority in operation speed and energy-efficiency.
We have demonstrated rapid-single-flux-quantum (RSFQ) circuits with reduced power consumptions by lowering bias voltages and critical currents. The power consumption including a power consumption of a bias resistor is measured to be around 1 nW/JJ in 8-bit shift registers, while the operating frequency ranges from 7.5 GHz to 20 GHz. we lower bias voltages applied to RSFQ circuits. The values of bias resistances are proportional to bias voltages. At lowered bias voltages, the power consumption of the bias resistor is reduced. When a voltage begins to be generated at a Josephson junction, the net current provided to the junction and to the shunt resistor is decreased. As a result, the magnitude of the voltage is suppressed, and the power consumption of the shunt resistor is reduced. The power energy-delay product is about 70 times smaller and the the energy-delay product is more than 13 times smaller than that of the conventional RSFQ circuits. Low poewer SFQ circuits are superior in terms of energy-delay product to semiconductor circuits though the power consumption of SFQ cicuits contains the refrigerating machine.
We designed and fabricated rapid single-flux-quantum (RSFQ) circuits using a new 20-kA/cm2process based on conventional Nb/AlOx/Nb Josephson junction (JJ) technology. Circular JJs were fabricated to improve their uniformity. They had sufficiently low spread of the critical currents for large-scale RSFQ circuits. We selected the circuit design parameters carefully, including the bias voltage and McCumber-Stewart parameter, balancing the energy consumption, switching speeds, margins, and integration density. We demonstrated several logic gates and shift registers at a clock frequency of 154 GHz with the designed bias voltage of 2.5 mV, and demonstrated energy-efficient shift registers using the low-voltage RSFQ (LV-RSFQ) technique at 83 GHz.
In this study, the trade-off among power consumptions, operating frequencies, and error rates in low-power single-flux-quantum (SFQ) circuit is investigated. The power consumption of SFQ circuits can be reduced by the lowering critical currents (
Icvalues) of the Josephson junctions (JJs), or the bias voltage (
Vb). The shifts and spreads of timing parameter fluctuations when
Icand
Vbwere lowered were numerically analyzed, with consideration of thermal noise at 4.2 K. The timing behaviors after
Icwas lowered were relatively simple, being based on the signal-to-noise ratio, whereas those for lowered
Vbvalues were complicated because of the dynamic behaviors of JJs driven at reduced voltage. The simulation results imply that the operating frequencies decreased because the timing windows narrowed, but the highest energy efficiency was obtained when we lowered
Icor
Vbto 6.25% of their conventional values, and the energy reduction after lowering of
Vbwas 26% better than that after lowering of
Ic. Moreover, if a small error rate (for example
10−6) is acceptable, further improvement in energy efficiency would be expected at significantly higher clock frequencies than would be the case if the SFQ circuit must exhibit error-free operation.
Superconducting single flux quantum (SFQ) circuits have been shown to offer huge advantages that are ideal for high performance computing applications. These circuits can operate at very high frequencies (tens of GHz) but consume very low power (from nanowatts to microwatts per gate). Energy-efficient SFQ (ERSFQ) circuits, evolved from traditional rapid SFQ (RSFQ) circuits, were invented with the goal of elimination of static power dissipation. When compared with RSFQ circuits, ERSFQ circuits require a new biasing network that includes biasing Josephson junction(s), biasing inductor(s), and feeding Josephson transmission line(s). Some general suggestions on how to design the network have been offered, but a detailed analysis and optimization scenario for the network is still to be provided. In this paper, we first optimize the previously reported DC-biased two-Josephson junction per bit RSFQ shift register circuit, which can be used to provide a more robust, energy-efficient, and high memory capacity storage unit. The simulated power dissipation of 16-bit RSFQ shift register is 0.45 μW per bit when operating at 21.7 GHz. We then convert the RSFQ-based shift register into an ERSFQ structure and investigate the effects of the ERSFQ bias network on the margins of the ERSFQ circuit. Finally, we propose a more comprehensive optimization method for the ERSFQ biasing network.