Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Physica C Superconductivity

Design and implementation of low-power SFQ circuits using LR-load biasing technique

T. Nishigai, Shohei Yamada, Nobuyuki Yoshikawa

Published Jul 13, 2006• 1 citation
Publisher
DOI
10.1016/j.physc.2006.05.095

Related papers

Development of the low power shift register memory by LR bias for the SFQ micro processor

Ryo Numaguchi

The Japan Society of Applied Physics•Feb 13, 2013•0 citations

Design of SFQ Circuits and Their Measurement

Kazunori Miyahara, Shuichi Nagasawa, H. Hasegawa +3 more

IEICE Transactions on Electronics•Mar 1, 2002•0 citations

Study of LR-Loading Technique for Low-Power Single Flux Quantum Circuits

Yuki Yamanashi, T. Nishigai, Nobuyuki Yoshikawa

A single-flux-quantum (SFQ) circuit is thought to be very suitable as a peripheral circuit for superconducting quantum bits (qubits), which can manipulate and detect the qubit state at a temperature state similar to qubits. Even though the power consumption of SFQ circuits is extremely small, it is still sufficient to heat the substrate at a temperature below 1 K. We have investigated and demonstrated low-power SFQ circuits for this application, using the LR-loading technique, which can reduce the static power consumption of the SFQ circuits. Simulation results show that the ratio of the switching speed to the time constant of the bias circuit is important for the stable operation of low-power SFQ circuits. The static power consumption of SFQ circuits can be reduced to the same order as the dynamic power consumption through optimization of the circuit parameters. We have designed and tested a low-power SFQ clock generator using the LR-loading technique and confirmed its stable operation at 4.2 K, where the power consumption is reduced by 93% compared with ordinary biased circuits.

IEEE Transactions on Applied Superconductivity•Jun 1, 2007•58 citations

Design and Measurement of zero static power SFQ circuit

Ryuta Tsutsumi

The Japan Society of Applied Physics•Feb 6, 2014•0 citations

High-speed demonstration of low-power 1 k-bit shift-register memories using LR-biasing SFQ circuits

Toshihiro Takahashi, Ryo Numaguchi, Yuki Yamanashi +1 more

We designed a low-power shift-register memory using single-flux-quantum (SFQ) circuits for bit-serial SFQ microprocessors. In order to reduce the static power consumption of the SFQ memories, LR-biasing SFQ circuits were employed, where the resistance network for supplying the bias current is replaced with the inductance network with small resistance. We implemented a low-power 1 k-bit SFQ shift-register memory and confirmed its 30 GHz operation for all addresses. The power consumption was reduced to 26% of the conventional resistively biased SFQ memories.

IEICE Electronics Express•Jan 1, 2016•8 citations

Challenges in the Realization of SFQ Digital Circuits

T. Van Duzer

Springer eBooks•Jan 1, 1999•0 citations
A single-flux-quantum (SFQ) circuit is thought to be very suitable as a peripheral circuit for superconducting quantum bits (qubits), which can manipulate and detect the qubit state at a temperature state similar to qubits. Even though the power consumption of SFQ circuits is extremely small, it is still sufficient to heat the substrate at a temperature below 1 K. We have investigated and demonstrated low-power SFQ circuits for this application, using the LR-loading technique, which can reduce the static power consumption of the SFQ circuits. Simulation results show that the ratio of the switching speed to the time constant of the bias circuit is important for the stable operation of low-power SFQ circuits. The static power consumption of SFQ circuits can be reduced to the same order as the dynamic power consumption through optimization of the circuit parameters. We have designed and tested a low-power SFQ clock generator using the LR-loading technique and confirmed its stable operation at 4.2 K, where the power consumption is reduced by 93% compared with ordinary biased circuits.
We designed a low-power shift-register memory using single-flux-quantum (SFQ) circuits for bit-serial SFQ microprocessors. In order to reduce the static power consumption of the SFQ memories, LR-biasing SFQ circuits were employed, where the resistance network for supplying the bias current is replaced with the inductance network with small resistance. We implemented a low-power 1 k-bit SFQ shift-register memory and confirmed its 30 GHz operation for all addresses. The power consumption was reduced to 26% of the conventional resistively biased SFQ memories.