Quantum computing promises to address problems in simulation, optimization, and chemistry, but current hardware operates in the noisy intermediate-scale (NISQ) regime where coherence limits, gate imperfections, and readout errors restrict performance. Improving calibration and mitigating errors therefore remain essential. This thesis analyzes error reduction on superconducting transmon qubits through calibration, gate analysis, and circuit-level mitigation. It compares single-qubit amplitude calibration methods and analyzes two-qubit gates based on the cross-resonance interaction, identifying differences in precision, convergence, and performance. In addition, it develops Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE) which measures effective error strength using inverted circuits. Compared to standard ZNE, IC-ZNE achieves results closer to ideal values and reduces observable errors. Overall, the presented methods improve the reliability of near-term quantum processors.
Quantum computing promises to address problems in simulation, optimization, and chemistry, but current hardware operates in the noisy intermediate-scale (NISQ) regime where coherence limits, gate imperfections, and readout errors restrict performance. Improving calibration and mitigating errors therefore remain essential. This thesis analyzes error reduction on superconducting transmon qubits through calibration, gate analysis, and circuit-level mitigation. It compares single-qubit amplitude calibration methods and analyzes two-qubit gates based on the cross-resonance interaction, identifying differences in precision, convergence, and performance. In addition, it develops Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE) which measures effective error strength using inverted circuits. Compared to standard ZNE, IC-ZNE achieves results closer to ideal values and reduces observable errors. Overall, the presented methods improve the reliability of near-term quantum processors.
Quantum computing is entering a transitional regime between noisy intermediate-scale quantum (NISQ) processing and early fault-tolerant quantum computation (FTQC), in which increasingly capable hardware is beginning to support repeated syndrome measurements, partial error correction, and logical-qubit operations, while residual physical and logical errors remain non-negligible. In this regime, error suppression, error mitigation, and quantum error correction are increasingly better viewed as complementary layers of a unified error-reduction strategy rather than as separate approaches, with each acting at a different stage of the quantum computation to improve simulation reliability. Thus, in this review, we provide a practical and forward-looking overview of the principal hardware error sources and the corresponding error suppression and mitigation methods for reducing their impact across the current NISQ-FTQC transition. We discuss hardware-aware circuit design, coherent-error suppression, readout mitigation, noise extrapolation, classical inference, and software-supported workflows, with particular emphasis on their implementation on actual quantum processors. We further examine how error mitigation techniques can be adapted to encoded and logical-qubit settings so that they can operate alongside quantum error correction to suppress residual logical errors and improve the accuracy of computation in the early fault-tolerant regime.
Quantum computing holds the potential to address problems that are currently considered intractable for classical processors by leveraging quantum mechanical effects for simulation, optimization, and chemistry. Despite recent technological progress, quantum hardware remains in the noisy intermediate-scale regime, where coherence limits, gate imperfections, and readout errors restrict circuit depth and algorithmic reliability. Although first demonstrations of small-scale Quantum Error Correction exist, logical processors with low logical error rates are still distant. In the near term, even error-corrected qubits are expected to operate with residual error, which means that improving calibration and mitigating errors at the physical and circuit level will remain essential for obtaining meaningful results. Established calibration routines and mitigation methods such as Zero-Noise-Extrapolation (ZNE) are valuable, but need to be further improved and more rigorously validated with respect to their underlying assumptions, stability and quantitative benefits. This thesis addresses error reduction techniques on transmon qubits through calibration, gate analysis, and circuit-level mitigation. First, a systematic comparison of two single-qubit amplitude calibration techniques is carried out (cross-point and ping-pong calibration), followed by an analysis of two implementations of a two-qubit gate, based on the cross-resonance interaction. The results show that cross-point calibration offers faster convergence, higher precision and a more favorable signal to noise ratio than ping-pong calibration. Hamiltonian tomography confirms the validity of a reduced model for the cross-resonance interaction, and algorithmic tests reveal that direct and echoed CNOT gates offer complementary advantages depending on the application. Second, the thesis develops and evaluates the method of Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE). Its main idea consists of measuring the effective error strength of a circuit through inverted circuits. This quantity is then used for extrapolation towards zero noise rather than relying on simple, approximate noise scaling assumptions as in standard ZNE. This approach constitutes a novel and original method. IC-ZNE consistently produces results closer to ideal reference values than standard ZNE. The method achieves up to 77% error reduction in observable error on the tested circuits compared to standard ZNE and simple post processing filters can yield up to 39% reduction in selected cases compared to standard ZNE. Further refinements introduce noise-adaptive circuit scaling strategies that enhance mitigation outcomes without significant additional cost. The performance of these techniques is examined across several circuits and in the context of variational quantum algorithms. Applications to the Quantum Approximate Optimization Algorithm and the Variational Quantum Eigensolver demonstrate that these techniques extend the useful operating regime of current devices, although their effectiveness decreases for very deep circuits or unfavorable variational ansätze. Taken together, the calibration and mitigation techniques investigated and developed in this thesis demonstrate practical routes toward enhancing the reliability of near-term quantum processors. While they cannot replace full fault-tolerant quantum computation, they offer useful and complementary capabilities that support progress toward scalable quantum technologies.
In quantum computing, noisy intermediate-scale quantum (NISQ) devices offer unprecedented computational capabilities but are vulnerable to errors, notably measurement inaccuracies that impact computation accuracy. This study explores the efficacy of error mitigation techniques in improving quantum circuit performance on NISQ devices. Techniques such as dynamic decoupling (DD), twirled readout error extraction (T-REx) and zero-noise extrapolation (ZNE) are examined through extensive experimentation on an ideal simulator, IBM Kyoto, and IBM Osaka quantum computers. Results reveal significant performance discrepancies across scenarios, with error mitigation techniques notably enhancing both estimator result and variance values, aligning more closely with ideal simulator outcomes. The comparison results with ideal simulator (having expected result value 0.8284) shows that T-Rex has improved results on IBM Kyoto and enhanced average expected result value from 0.09 to 0.35. Similarly, DD has improved average expected result values from 0.2492 to 0.3788 on IBM Osaka. These findings underscore the critical role of error mitigation in bolstering quantum computation reliability. The results suggest that selection of mitigation technique depends upon quantum circuit and its depth, type of hardware and operations to be performed.
A long-standing challenge in quantum computing is developing technologies to overcome the inevitable noise in qubits. To enable meaningful applications in the early stages of fault-tolerant quantum computing, devising methods to suppress post-correction logical failures is becoming increasingly crucial. In this work, we propose and experimentally demonstrate the application of zero-noise extrapolation, a practical quantum error mitigation technique, to error correction circuits on superconducting processors. By amplifying the noise on physical qubits, the circuits yield outcomes that exhibit a predictable dependence on noise strength, following a polynomial function determined by the code distance. This property enables the effective application of polynomial extrapolation to mitigate logical errors. Our experiments demonstrate a universal reduction in logical errors across various quantum circuits, including fault-tolerant circuits of repetition and surface codes. We observe a favorable performance in multi-round error correction circuits, indicating that this method remains effective when the circuit depth increases. These results advance the frontier of quantum error suppression technologies, opening a practical way to achieve reliable quantum computing in the early fault-tolerant era. Quantum error mitigation refers to techniques that reduce, rather than correct, errors in quantum computing. Here the authors demonstrate zero-noise extrapolation applied to quantum error correction circuits on superconducting processors, effectively reducing logical errors and advancing early fault-tolerant quantum computing.
Quantum computing promises to revolutionize several scientific and technological domains through fundamentally new ways of processing information. Among its most compelling applications is digital quantum simulation, where quantum computers are used to replicate the behavior of other quantum systems. This could enable the study of problems that are otherwise intractable on classical computers, transforming fields such as quantum chemistry, condensed matter physics, and materials science. Despite this potential, realizations of practical quantum advantage for relevant problems are hindered by imperfections of current devices. This also affects quantum hardware based on superconducting circuits which is among the most advanced and scalable platforms. The envisaged long-term solution of fault-tolerant quantum computers that correct their own errors remains out of reach mainly due to the associated qubit number overhead. As a result, the field has developed strategies that combine quantum and classical resources, exploit hardware-native operations, and employ error mitigation techniques to extract meaningful results from noisy data. This doctoral thesis contributes to this broader effort by exploring methods for advancing quantum simulation across the full computational stack, including hardware-level innovations, refined techniques for noise modeling and error mitigation, and algorithmic improvements enabled by efficient measurement processing.
Abstract Quantum computing has recently emerged as a novel paradigm for solving problems otherwise intractable on classical computers, yet the practical progress of quantum computers is severely impacted by noise, decoherence, and imperfect gate operations in Noisy Intermediate-Scale Quantum (NISQ) devices. Specific to IBM Quantum hardware, imperfections due to readout error, gate errors, and device drift, which depends on time, resolves limits for the accuracy of outputs from our algorithms. The mitigation strategies currently used, for example, Measurement Error Mitigation (MEM), Zero Noise Extrapolation (ZNE), and Clifford Data Regression (CDR), offer improvement over raw, unmitigated outputs, but they are static and not dynamic; the reduction of noise in within an NISQ device is temporal and can vary in patterns that are non-zero. In addition to this, using the conventional methods provides inconsistent and suboptimal results.This study will provide enhanced reliability with respect to performing quantum computation on IBM Quantum hardware with a unique mitigation framework that is adaptive and computationally efficient for a high-fidelity output. The problem taken on here is the failure of existing error mitigation strategies to provide adaptive noise compensation, as they assume a statically-distributed error, despite the performance-related characteristics already being documented in regards to calibration drift and variation over time.To achieve this, we propose a Hybrid Adaptive Error Mitigation (HAEM) approach that includes baseline measurement error mitigation and an additional correction layer that utilizes realtime calibration information, along with lightweight machine learning models. The approach can be broken down into three steps: (i) perform standard measurement error mitigation to reduce classical readout noise, (ii) execute compact calibration circuits, such as Bell states, GHZ states and Clifford benchmarks to capture then current error profile of the device, and (iii) use a lightweight machine learning model (having been trained on historical and newest calibration data) to dynamically change the mitigation weights applied for the target quantum algorithm. All implementation is done using Qiskit Runtime to ensure low-latency execution, and we completed experiments on both Qiskit Aer noisy simulators and IBM Quantum devices.Initial results suggest HAEM improved the outputs of quantum algorithms' fidelity compared to the unmitigated runs and the baseline measurement error mitigation (MEM) runs. On the noisy simulators, HAEM increased fidelity from a raw performance of 0.65 to 0.87, nearly a 34% improvement. In fairer hardware-like scenarios, fidelity-on-average was persistently 12% better than MEM, with nearly equal time duration for the additional adaptive measurements. The adaptive aspect of HAEM consistently supported subsequent calibration cycles of the device and was effective to continue providing fidelity improvements despite the static mitigation performance degrading.To sum up, the proposed HAEM framework is a modern and viable alternative for error mitigation which brings together the benefits of baseline approaches with corrections that are driven by fixed-function error-corrective, adaptive learning. As both learning-based and standard baseline approaches can only achieve fixed levels of performance, HAEM, through its use of noise mitigation both at execution time and through correlating it with standard data, provides a route towards reliable quantum computations on current IBM hardware. HAEM also presents a contribution to the NISQ error-resilient landscape, and however it is intended that it will continue to improve future applications of hybrid workflows of quantum and classical computation where error mitigation and resilience is important.