Quantum computing holds the potential to address problems that are currently considered intractable for classical processors by leveraging quantum mechanical effects for simulation, optimization, and chemistry. Despite recent technological progress, quantum hardware remains in the noisy intermediate-scale regime, where coherence limits, gate imperfections, and readout errors restrict circuit depth and algorithmic reliability. Although first demonstrations of small-scale Quantum Error Correction exist, logical processors with low logical error rates are still distant. In the near term, even error-corrected qubits are expected to operate with residual error, which means that improving calibration and mitigating errors at the physical and circuit level will remain essential for obtaining meaningful results. Established calibration routines and mitigation methods such as Zero-Noise-Extrapolation (ZNE) are valuable, but need to be further improved and more rigorously validated with respect to their underlying assumptions, stability and quantitative benefits. This thesis addresses error reduction techniques on transmon qubits through calibration, gate analysis, and circuit-level mitigation. First, a systematic comparison of two single-qubit amplitude calibration techniques is carried out (cross-point and ping-pong calibration), followed by an analysis of two implementations of a two-qubit gate, based on the cross-resonance interaction. The results show that cross-point calibration offers faster convergence, higher precision and a more favorable signal to noise ratio than ping-pong calibration. Hamiltonian tomography confirms the validity of a reduced model for the cross-resonance interaction, and algorithmic tests reveal that direct and echoed CNOT gates offer complementary advantages depending on the application. Second, the thesis develops and evaluates the method of Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE). Its main idea consists of measuring the effective error strength of a circuit through inverted circuits. This quantity is then used for extrapolation towards zero noise rather than relying on simple, approximate noise scaling assumptions as in standard ZNE. This approach constitutes a novel and original method. IC-ZNE consistently produces results closer to ideal reference values than standard ZNE. The method achieves up to 77% error reduction in observable error on the tested circuits compared to standard ZNE and simple post processing filters can yield up to 39% reduction in selected cases compared to standard ZNE. Further refinements introduce noise-adaptive circuit scaling strategies that enhance mitigation outcomes without significant additional cost. The performance of these techniques is examined across several circuits and in the context of variational quantum algorithms. Applications to the Quantum Approximate Optimization Algorithm and the Variational Quantum Eigensolver demonstrate that these techniques extend the useful operating regime of current devices, although their effectiveness decreases for very deep circuits or unfavorable variational ansätze. Taken together, the calibration and mitigation techniques investigated and developed in this thesis demonstrate practical routes toward enhancing the reliability of near-term quantum processors. While they cannot replace full fault-tolerant quantum computation, they offer useful and complementary capabilities that support progress toward scalable quantum technologies.
Quantum computing holds the potential to address problems that are currently considered intractable for classical processors by leveraging quantum mechanical effects for simulation, optimization, and chemistry. Despite recent technological progress, quantum hardware remains in the noisy intermediate-scale regime, where coherence limits, gate imperfections, and readout errors restrict circuit depth and algorithmic reliability. Although first demonstrations of small-scale Quantum Error Correction exist, logical processors with low logical error rates are still distant. In the near term, even error-corrected qubits are expected to operate with residual error, which means that improving calibration and mitigating errors at the physical and circuit level will remain essential for obtaining meaningful results. Established calibration routines and mitigation methods such as Zero-Noise-Extrapolation (ZNE) are valuable, but need to be further improved and more rigorously validated with respect to their underlying assumptions, stability and quantitative benefits. This thesis addresses error reduction techniques on transmon qubits through calibration, gate analysis, and circuit-level mitigation. First, a systematic comparison of two single-qubit amplitude calibration techniques is carried out (cross-point and ping-pong calibration), followed by an analysis of two implementations of a two-qubit gate, based on the cross-resonance interaction. The results show that cross-point calibration offers faster convergence, higher precision and a more favorable signal to noise ratio than ping-pong calibration. Hamiltonian tomography confirms the validity of a reduced model for the cross-resonance interaction, and algorithmic tests reveal that direct and echoed CNOT gates offer complementary advantages depending on the application. Second, the thesis develops and evaluates the method of Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE). Its main idea consists of measuring the effective error strength of a circuit through inverted circuits. This quantity is then used for extrapolation towards zero noise rather than relying on simple, approximate noise scaling assumptions as in standard ZNE. This approach constitutes a novel and original method. IC-ZNE consistently produces results closer to ideal reference values than standard ZNE. The method achieves up to 77% error reduction in observable error on the tested circuits compared to standard ZNE and simple post processing filters can yield up to 39% reduction in selected cases compared to standard ZNE. Further refinements introduce noise-adaptive circuit scaling strategies that enhance mitigation outcomes without significant additional cost. The performance of these techniques is examined across several circuits and in the context of variational quantum algorithms. Applications to the Quantum Approximate Optimization Algorithm and the Variational Quantum Eigensolver demonstrate that these techniques extend the useful operating regime of current devices, although their effectiveness decreases for very deep circuits or unfavorable variational ansätze. Taken together, the calibration and mitigation techniques investigated and developed in this thesis demonstrate practical routes toward enhancing the reliability of near-term quantum processors. While they cannot replace full fault-tolerant quantum computation, they offer useful and complementary capabilities that support progress toward scalable quantum technologies.
Quantum computing promises to address problems in simulation, optimization, and chemistry, but current hardware operates in the noisy intermediate-scale (NISQ) regime where coherence limits, gate imperfections, and readout errors restrict performance. Improving calibration and mitigating errors therefore remain essential. This thesis analyzes error reduction on superconducting transmon qubits through calibration, gate analysis, and circuit-level mitigation. It compares single-qubit amplitude calibration methods and analyzes two-qubit gates based on the cross-resonance interaction, identifying differences in precision, convergence, and performance. In addition, it develops Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE) which measures effective error strength using inverted circuits. Compared to standard ZNE, IC-ZNE achieves results closer to ideal values and reduces observable errors. Overall, the presented methods improve the reliability of near-term quantum processors.
Quantum computing is entering a transitional regime between noisy intermediate-scale quantum (NISQ) processing and early fault-tolerant quantum computation (FTQC), in which increasingly capable hardware is beginning to support repeated syndrome measurements, partial error correction, and logical-qubit operations, while residual physical and logical errors remain non-negligible. In this regime, error suppression, error mitigation, and quantum error correction are increasingly better viewed as complementary layers of a unified error-reduction strategy rather than as separate approaches, with each acting at a different stage of the quantum computation to improve simulation reliability. Thus, in this review, we provide a practical and forward-looking overview of the principal hardware error sources and the corresponding error suppression and mitigation methods for reducing their impact across the current NISQ-FTQC transition. We discuss hardware-aware circuit design, coherent-error suppression, readout mitigation, noise extrapolation, classical inference, and software-supported workflows, with particular emphasis on their implementation on actual quantum processors. We further examine how error mitigation techniques can be adapted to encoded and logical-qubit settings so that they can operate alongside quantum error correction to suppress residual logical errors and improve the accuracy of computation in the early fault-tolerant regime.
A long-standing challenge in quantum computing is developing technologies to overcome the inevitable noise in qubits. To enable meaningful applications in the early stages of fault-tolerant quantum computing, devising methods to suppress post-correction logical failures is becoming increasingly crucial. In this work, we propose and experimentally demonstrate the application of zero-noise extrapolation, a practical quantum error mitigation technique, to error correction circuits on superconducting processors. By amplifying the noise on physical qubits, the circuits yield outcomes that exhibit a predictable dependence on noise strength, following a polynomial function determined by the code distance. This property enables the effective application of polynomial extrapolation to mitigate logical errors. Our experiments demonstrate a universal reduction in logical errors across various quantum circuits, including fault-tolerant circuits of repetition and surface codes. We observe a favorable performance in multi-round error correction circuits, indicating that this method remains effective when the circuit depth increases. These results advance the frontier of quantum error suppression technologies, opening a practical way to achieve reliable quantum computing in the early fault-tolerant era. Quantum error mitigation refers to techniques that reduce, rather than correct, errors in quantum computing. Here the authors demonstrate zero-noise extrapolation applied to quantum error correction circuits on superconducting processors, effectively reducing logical errors and advancing early fault-tolerant quantum computing.
Quantum computation is expected to have significant practical applications. The main problem in quantum computing is susceptibility to noise. Quantum error correction was developed to allow large-scale applications of quantum computing by achieving fault tolerance. However, as large-scale fault-tolerant quantum computation is not available, the question of applications of near-term hardware remains important. Current noisy intermediate-scale (NISQ) quantum devices can be used for small applications or as testbeds for larger applications; noise suppression techniques are of significant importance to their applicability. This thesis addresses noise suppression via quantum error mitigation (QEM) and quantum error correction (QEC) for near-term applications. The work aims to improve the understanding of noise-suppression techniques and their performance for exploring the physical systems of interest. The results presented in this thesis are divided into QEM and QEC chapters. The majority of the work is focused on QEM. The main interest of this thesis is the application of QEM to Hamiltonian simulations. Two simulation methods: the Trotter method and a quantum signal processing-based method, are explored. Both simulation methods, enhanced by zero-noise extrapolation, are employed to simulate the transverse-field Ising model. The obtained numerical results are promising, as the QEM allows a good recovery of noiseless values in low-noise shallow circuits, even with fixed sampling resources. A further result obtained in the QEM domain is a definition of a mitigation technique based on optimal measurement (in a metrological sense). The presentation includes analytical calculations of implementation costs and error propagation, as well as a numerical application to Hamiltonian simulation, yielding promising results: noise suppression by several orders of magnitude. The QEC part of the thesis explores its application in quantum metrology. The focus is on parameter sensing in many-body Hamiltonians. The results are purely analytical and extend a known lemma to m-local homogeneous Pauli Hamiltonian parameter sensing. This allows discussion of the scaling achieved for sensing the Hamiltonian parameters with respect to the code properties. The results in this thesis establish applications of QEM and QEC in selected near-term applications, quantify their performance, and discuss caveats and potential future applications. This thesis presents a theoretical and numerical study with implications for future experimental implementations. The relative success of the QEM and QEC shown in this thesis relies on tailoring the techniques to a chosen problem, highlighting the importance of technique adaptation in near-term applications.
Quantum error mitigation (QEM) is typically viewed as a suite of practical techniques for today's noisy intermediate-scale quantum devices, with limited relevance once fault-tolerant quantum computers become available. In this work, we challenge this conventional wisdom by showing that QEM can continue to provide substantial benefits in the era of quantum error correction (QEC), and in an even more efficient manner than it does on current devices. We introduce a framework for logical-level QEM that leverages soft information naturally produced by QEC decoders, requiring no additional data, hardware modifications, or runtime overhead beyond what QEC protocols already provide. Within this framework, we develop and analyze three logical-level QEM techniques: post-selection and runtime abort policies, probabilistic error cancellation, and zero-noise extrapolation. Our techniques reduce logical error rates by more than 100x while discarding fewer than 0.1% of shots; they also provide in situ characterization of logical channels for QEM protocols. As a proof of principle, we benchmark our approach using a surface-code architecture and two state-of-the-art decoders based on tensor-network contraction and minimum-weight perfect matching. We evaluate logical-level QEM on random Clifford circuits and molecular simulation algorithms and find that, compared to previous approaches relying on QEC only or QEC combined with QEM, we can achieve up to 87.4% spacetime overhead savings. Our results demonstrate that logical-level QEM with QEC decoder soft information can reliably improve logical performance, underscoring the efficiency and usefulness of QEM techniques for fault-tolerant quantum computers.
Quantum computing promises to revolutionize several scientific and technological domains through fundamentally new ways of processing information. Among its most compelling applications is digital quantum simulation, where quantum computers are used to replicate the behavior of other quantum systems. This could enable the study of problems that are otherwise intractable on classical computers, transforming fields such as quantum chemistry, condensed matter physics, and materials science. Despite this potential, realizations of practical quantum advantage for relevant problems are hindered by imperfections of current devices. This also affects quantum hardware based on superconducting circuits which is among the most advanced and scalable platforms. The envisaged long-term solution of fault-tolerant quantum computers that correct their own errors remains out of reach mainly due to the associated qubit number overhead. As a result, the field has developed strategies that combine quantum and classical resources, exploit hardware-native operations, and employ error mitigation techniques to extract meaningful results from noisy data. This doctoral thesis contributes to this broader effort by exploring methods for advancing quantum simulation across the full computational stack, including hardware-level innovations, refined techniques for noise modeling and error mitigation, and algorithmic improvements enabled by efficient measurement processing.