The calculation of cryptographic hash functions is of significant importance for data integrity, cryptography and applications built on blockchain technology. Bitcoin, as the first and most prominent cryptocurrency, makes use of the cryptographic SHA-256 hash algorithm. The calculation of the SHA-256 hash at scale is energy intensive, and Bitcoin mining currently accounts for a significant fraction of global energy use. In this paper, we present the first known implementation of a full SHA-256 accelerator with ultra low-power Adiabatic Quantum Flux Parametron (AQFP) superconducting digital logic circuits, complete with a comprehensive simulated energy analysis. The analysis leverages the latest superconductor circuit simulation tools, and the results project significant power efficiency gains over traditional CMOS accelerators. We show an estimated efficiency of 548.35 THash/J, 173.08 THash/J and 56.32 THash/J for 2 GHz, 5 GHz and 10 GHz system clocks respectively at the chip level, before any architectural optimization. We conclude that even after accounting for cooling power, an AQFP SHA-256 accelerator will outperform the best semiconductor Bitcoin miner.
The calculation of cryptographic hash functions is of significant importance for data integrity, cryptography and applications built on blockchain technology. Bitcoin, as the first and most prominent cryptocurrency, makes use of the cryptographic SHA-256 hash algorithm. The calculation of the SHA-256 hash at scale is energy intensive, and Bitcoin mining currently accounts for a significant fraction of global energy use. In this paper, we present the first known implementation of a full SHA-256 accelerator with ultra low-power Adiabatic Quantum Flux Parametron (AQFP) superconducting digital logic circuits, complete with a comprehensive simulated energy analysis. The analysis leverages the latest superconductor circuit simulation tools, and the results project significant power efficiency gains over traditional CMOS accelerators. We show an estimated efficiency of 548.35 THash/J, 173.08 THash/J and 56.32 THash/J for 2 GHz, 5 GHz and 10 GHz system clocks respectively at the chip level, before any architectural optimization. We conclude that even after accounting for cooling power, an AQFP SHA-256 accelerator will outperform the best semiconductor Bitcoin miner.
Complementary metal-oxide-semiconductor (CMOS) circuit technology has sustainedthe exponential growth of computing power for more than 20 years. However, it hasbeen estimated that the power consumption of a next-generation supercomputer willexceed the power supplied from a single power plant. This indicates the need to dramaticallyimprove the energy efficiency of logic devices to achieve future high-endcomputers.As an extremely energy-efficient logic, we proposed and have been investigatingadiabatic quantum-flux-parametron (AQFP) devices. Due to adiabatic switching operations,its bit energy (energy dissipation per bit) can go below Ic 0, where Ic is acritical current of a Josephson junction and 0 is a single-flux-quantum (SFQ). Ic 0corresponds to the energy dissipated at every 2 phase transition in conventional nonadiabaticsuperconductor logics.We have two objectives in this study. One is to reveal physical energy bounds oncomputation through investigation of the energy efficiency of AQFP logic. The otheris to develop fundamental circuits necessary for energy-efficient computing systemsusing AQFP logic.First, we numerically and experimentally demonstrated the sub-Ic 0 bit-energyoperations of AQFP gates to show that AQFP gates operate in adiabatic modes. Weinvestigated the dependence of energy dissipation and operation margins on circuitparameters. After optimizing the parameters, we calculated the bit energy and the biterror rate at 4.2 K to verify the sub-Ic 0 bit-energy operations at a finite temperature.Additionally, we measured the bit energy of an AQFP gate using a superconductorresonator-based method.Secondly, we numerically demonstrated the sub-kBT bit-energy operations, wherekB is the Boltzmann constant and T is temperature, to show that AQFP gates can operatebeyond thermodynamic energy bounds. We investigated the dependence of energydissipation on operation frequencies and damping conditions of Josephson junctions.By using underdamped junctions, we confirmed the sub-kBT bit-energy operationsat a finite temperature thorough circuit simulation. This result indicates that thereis no minimum energy dissipation required for the operations of AQFP gates unlessthe entropy of the system decreases, which corresponds to the Landauer’s argument on the minimum energy dissipation for computation. Also, we discussed quantummechanicalenergy bounds and experimentally demonstrated AQFP gates with underdampedjunctions.Additionally, we investigated reversible computing using AQFP logic with underdampedjunctions, in order to deal with an important but unresolved question: “Isreversible computing achievable by using practical devices?” We built a purely reversiblegate by using AQFP gates, which we designated as the reversible quantumflux-parametron (RQFP) gate. We calculated its energy dissipation and confirmed thatthere is no minimum energy dissipation for reversible logic operations using RQFPgates. To the best of our knowledge, these are the first calculation results that show nominimum energy dissipation in reversible computing that use practical circuit structures.Moreover, our experimental results have demonstrated the logical and physicalreversibility of the RQFP gate. We believe that this is the first demonstration thatshows both logical and physical reversibility using practical devices.Finally, we proposed a novel energy-efficient latch for AQFP logic, which we designatedas the quantum-flux-latch (QFL). Latches are necessary circuitries in largecomputing systems but had been missing in AQFP logic. We discussed its energyefficiency through simulation and experimentally demonstrated correct operations ofthe QFL and a 1-bit shift register using QFLs. Also, we proposed high-speed test circuitsusing QFLs and experimentally demonstrated logic operations of AQFP circuitsat high speed.We strongly believe that our results showed the extremely high energy efficiency ofAQFP logic. These results will move the AQFP logic to practical usage as extremelyenergy-efficient integrated circuits.
The implementation of an Adiabatic Quantum-Flux-Parametron (AQFP) 8-bit Ripple Carry Adder with the capability to operate indifferent clock cycles is explored in this study. Leveraging Superconducting digital circuits employing Josephson junctions, this approach garners significant attention due to its ultra-fast operation and minimal energy consumption. In this study, we investigate the implementation of an Adiabatic Quantum-Flux-Parametron (AQFP) 8-bit Ripple Carry Adder with the flexibility to operate across different clock cycles. Leveraging the capabilities of Superconducting digital circuits and Josephson junctions, this approach is notable for its rapid operation and minimal energy consumption. Our focus lies on examining the effects of varying clock cycles on key performance parameters. A comprehensive analysis of memory usage, CPU utilization, and execution time is presented for different phase delays corresponding to 1 clock cycle, 2 clock cycles, both 1 and 2 clock cycles, and no clock cycle. The results indicate subtle fluctuations in memory usage, CPU utilization, and execution time across these configurations, providing insights into the system's adaptability to different clocking schemes. Furthermore, we propose a novel clocking strategy tailored specifically for AQFP circuits, termed as “indifferent clock cycles,” which allows for seamless operation irrespective of the clock cycle duration. Through this approach, we aim to optimize system performance while accommodating diverse operational requirements. By exploring the implications of indifferent clock cycles on AQFP-based systems, we aim to pave the way for more versatile and efficient superconducting digital circuits. This research contributes to the ongoing efforts in advancing the field of quantum-flux-parametron logic and its applications in high-performance computing systems.
Cryptocurrency mining processes always lead to a high energy consumption at considerably high production cost, which is nearly one-third of cryptocurrency (e.g. Bitcoin) price itself. As the core of mining process is based on SHA-256 cryptographic hashing function, by using the alternative quantum computers, hybrid quantum computers or more larger quantum computing devices like quantum annealers, it would be possible to reduce the mining energy consumption with a quantum hardware's low-energy-operation characteristics. Within this work we demonstrated the use of optimized quantum mining facilities which would replace the classical SHA-256 and high energy consuming classical hardware in near future.
Abstract Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic with zero static power and very small dynamic power due to adiabatic switching operations. In order to build large-scale digital circuits, we built AQFP logic cells using superconductor magnetic shields, which are necessary in order to avoid unwanted magnetic couplings between the cells and excitation currents. In preliminary experimental tests, we confirmed that the unwanted coupling became negligibly small thanks to the superconductor shields. As a demonstration, we designed a four-to-one multiplexor and a 16-junction full adder using the shielded logic cells. In both circuits, we confirmed correct logic operations with wide operation margins of excitation currents. These results indicate that large-scale AQFP digital circuits can be realized using the shielded logic cells.
Adiabatic quantum-flux-parametron (AQFP) circuits are very low-power due to zero static power consumption and adiabatic switching operations. However, compared to other superconducting circuits, such as rapid single-flux-quantum logic, the operation frequency is relatively low and the latency is relatively large. In this work, we propose multi-excitation AQFP (ME-AQFP) circuits for high-speed and low-latency operations. In ME-AQFP, the intrinsic periodicity of the potential energy of a Josephson device with respect to applied magnetic fluxes is utilized to multiply operation frequencies and reduce latency. In a numerical simulation, we demonstrated an ME-AQFP AND gate, which operates at 10 GHz or 20 GHz with 5-GHz excitation currents. We also evaluated the energy efficiency of ME-AQFP circuits. In an experiment, we successfully demonstrated an ME-AQFP XOR gate and an ME-AQFP full adder.
We have been investigating an ultra-low-power adiabatic quantum-flux-parametron (AQFP) logic, the energy dissipation of which can be decreased by changing its potential energy slowly or adiabatically. In the present study, we designed basic AQFP logic gates and an AQFP 1-bit full adder, and examined their operations through simulations and experiments. The AQFP 1-bit full adder is composed of 46 Josephson junctions, which is approximately one-quarter the number of junctions of a full adder using conventional rapid single-flux-quantum logic. The measurement results indicated that the AQFP 1-bit full adder has a wide current bias margin of as large as ±27.8%.