We describe chip-scale batch-fabricated cesium cells utilizing semiconductor wafer processing, pin transfer of cesium, and silicon/Pyrex anodic bonding for cell sealing. Highspeed, single-mode linearly polarized VCSELs emitting at the 133Cs D1 line were fabricated, optimized for low threshold and high-speed operation with overall small power dissipation. Coherent population trapping (CPT) end-resonance signals with a contrast and linewidth of 5.4% and 7.1 kHz respectively are achieved using 1 mm optical path length cells and VCSEL driven with 1.25 mW RF modulation and 2.76 mW DC power dissipation. We demonstrate short-term stability with an atomic clock built with these components operating on the CPT end-resonance. The magnetic field is stabilized with a novel magnetic field locking scheme tapping the Zeeman resonance.
We describe chip-scale batch-fabricated cesium cells utilizing semiconductor wafer processing, pin transfer of cesium, and silicon/Pyrex anodic bonding for cell sealing. Highspeed, single-mode linearly polarized VCSELs emitting at the 133Cs D1 line were fabricated, optimized for low threshold and high-speed operation with overall small power dissipation. Coherent population trapping (CPT) end-resonance signals with a contrast and linewidth of 5.4% and 7.1 kHz respectively are achieved using 1 mm optical path length cells and VCSEL driven with 1.25 mW RF modulation and 2.76 mW DC power dissipation. We demonstrate short-term stability with an atomic clock built with these components operating on the CPT end-resonance. The magnetic field is stabilized with a novel magnetic field locking scheme tapping the Zeeman resonance.
We have undertaken the development of a chip-scale atomic clock (CSAC) whose design goals include short-term stability, sigma(sub y)(tau=1 hour), of 1x10(exp 11) with a total power consumption of 30 mW and an overall device volume of 1 cu cm. The stringent power requirement dominates the physics package architecture, dictating a small (<5 mm(exp 3) gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002, we reported on initial experimental investigations leading to the decision to employ the coherent population trapping (CPT) interrogation technique. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser (VCSEL) sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass. Measurements of the signal contrast and linewidth of both the cesium D1 and D2 resonance transitions are compared, and frequency stability measurements of the CSAC testbed are presented.
A chip-scale atomic clock implemented with end-state physics has been fabricated and characterized. Batch-fabricated components were specifically designed and developed to enable integration within a small form-factor package. The full physics package, implemented with CW VCSEL optical pump, direct end-state hyperfine RF and Zeeman interrogation for magnetic field stabilization, was demonstrated within a 4 cm3 volume, consuming 25 mW of power, and exhibiting an Allan deviation stability. In addition, end-state signal contrast exceeded 40% from millimeter-scale vapor cells with buffer-gas pressures exceeding 2.5 atmospheres, demonstrating the route to submillimeter vapor-cells within high-performance CSACs for high shock/vibration environments.
The spectroscopic technique of coherent population trapping (CPT) enables an all-optical interrogation of the groundstate hyperfine splitting of cesium (or rubidium), compared to the optical-microwave double resonance technique conventionally employed in atomic frequency standards. All-optical interrogation enables the reduction of the size and power consumption of an atomic clock by two orders of magnitude, and vertical-cavity surface-emitting lasers (VCSELs) are preferred optical sources due to their low power consumption and circular output beam. Several research teams are currently using VCSELs for DARPA's chip-scale atomic clock (CSAC) program with the goal of producing an atomic clock having a volume < 1 cm^3, a power consumption < 30 mW, and an instability (Allan deviation) < 1x10^-11 during a 1-hour averaging interval. This paper describes the VCSEL requirements for CPT-based atomic clocks, which include single mode operation, single polarization operation, modulation bandwidth > 4 GHz, low power consumption (for the CSAC), narrow linewidth, and low relative intensity noise (RIN). A significant manufacturing challenge is to reproducibly obtain the required wavelength at the specified VCSEL operating temperature and drive current. Data are presented that show the advantage of operating at the D1 (rather than D2) resonance of the alkali atoms. Measurements of VCSEL linewidth will be discussed in particular, since atomic clock performance is especially sensitive to this parameter.
The article presents the results of the development, fabrication and investigation of miniature cesium vapor cells for quantum frequency standards with optical pumping, working on the effect of coherent population trapping. Microelectromechanical systems technologies were used in the manufacture of cells. For the first time, the dry silicon etching in inductively coupled plasma of sulfur hexafluoride and freon gas in a mixed mode was used to form internal cavities of cells with a thickness of 1.5 mm. Vacuum-tight sealing of cells containing a solid-state source of cesium vapor and buffer gas was carried out by anodic bonding of glass and silicon in a neon atmosphere. The coherent population trapping signal with a linewidth of 750 Hz and a signal-to-noise ratio of 1190 in the 1-Hz bandwidth was observed. Experimental results show that these microcells are appropriate for applications to atomic clock with a relative frequency stability of6⋅10−11at 1 s.
Chip-scale atomic clocks are critical for applications requiring compact, energy-efficient, and highly stable timing, such as GPS receivers and communication systems. Coherent population trapping (CPT)-based atomic clocks, which commonly use vertical-cavity surface-emitting lasers (VCSELs), have enabled significant miniaturization. However, their precision is limited by the broad linewidth of VCSELs. Alternative laser technologies, such as distributed Bragg reflector lasers, distributed feedback lasers, and external cavity diode lasers (ECDLs), offer potential improvements but face challenges in achieving compact size and adequate modulation bandwidth. This study presents a 795 nm chip-ECDL with a direct modulation bandwidth up to 4 GHz, specifically designed for CPT chip-scale atomic clocks. Based on the chip-ECDL, a CPT atomic clock with a compact volume of 19.4 ml and power consumption of 1.5 W has been developed. Under identical operating conditions, the CPT signal produced by the chip-ECDL exhibits a 34% reduction in linewidth and a 1.14-fold increase in contrast compared to a VCSEL-based clock. Demonstrating short-term stability better than 5×10−11τ−1/2(1 s<τ<2000 s) and reaching a best stability of 6.6×10−13 at 2000 s, this work represents the application of an ECDL in a CPT chip-scale clock, advancing the development of next-generation, high-performance chip-scale atomic clocks.
Herein, a microfabricated millimeter-level vapor alkali cell with a high hermeticity is fabricated through a wet etching and single-chip anodic bonding process. The vapor cell, containing Rb and N2, was investigated in a coherent population trapping (CPT) setup for the application of a chip-scale atomic clock (CSAC). The contrast of CPT resonance is up to 1.1% within the only 1 mm length of light interacting with atom. The effects of some critical external parameters on the CPT resonance, such as laser intensity, cell temperature, and buffer gas pressure, are thoroughly studied and optimized. The improved microfabricated vapor cell also exhibited great potential for other chip-scale atomic devices.