Heterogeneous integration of spin–photon interfaces with a CMOS platform
Linsen Li, Lorenzo De Santis, Isaac Harris, Kevin C. Chen, Yihuai Gao, Ian Christen, Hyeongrak Choi, Matthew E. Trusheim, Yixuan Song, Carlos Errando-Herranz, Jiahui Du, Yong Hu, Genevieve Clark, Mohamed I. Ibrahim, Gerald N. Gilbert, Ruonan Han, Dirk Englund
Abstract Color centers in diamonds have emerged as a leading solid-state platform for advancing quantum technologies, satisfying the DiVincenzo criteria and recently achieving a quantum advantage in secret key distribution. Recent theoretical works estimate that general-purpose quantum computing using local quantum communication networks will require millions of physical qubits to encode thousands of logical qubits, which presents a substantial challenge to the hardware architecture at this scale. To address the unanswered scaling problem, in this work, we first introduce a scalable hardware modular architecture ''Quantum System-on-Chip'' (QSoC) that features compact two-dimensional arrays ''quantum microchiplets'' (QMCs) containing tin-vacancy (SnV^-) spin qubits integrated on a cryogenic application-specific integrated circuit (ASIC). We demonstrate crucial architectural subcomponents, including (1) QSoC fabrication via a lock-and-release method for large-scale heterogeneous integration; (2) a high-throughput calibration of the QSoC for spin qubit spectral inhomogenous registration; (3) spin qubit spectral tuning functionality for inhomogenous compensation; (4) efficient spin-state preparation and measurement for improved spin and optical properties. QSoC architecture supports full connectivity for quantum memory arrays in a set of different resonant frequencies and offers the possibility for further scaling the number of solid-state physical qubits via larger and denser QMC arrays and optical frequency multiplexing networking.
Abstract Color centers in diamonds have emerged as a leading solid-state platform for advancing quantum technologies, satisfying the DiVincenzo criteria and recently achieving a quantum advantage in secret key distribution. Recent theoretical works estimate that general-purpose quantum computing using local quantum communication networks will require millions of physical qubits to encode thousands of logical qubits, which presents a substantial challenge to the hardware architecture at this scale. To address the unanswered scaling problem, in this work, we first introduce a scalable hardware modular architecture ''Quantum System-on-Chip'' (QSoC) that features compact two-dimensional arrays ''quantum microchiplets'' (QMCs) containing tin-vacancy (SnV^-) spin qubits integrated on a cryogenic application-specific integrated circuit (ASIC). We demonstrate crucial architectural subcomponents, including (1) QSoC fabrication via a lock-and-release method for large-scale heterogeneous integration; (2) a high-throughput calibration of the QSoC for spin qubit spectral inhomogenous registration; (3) spin qubit spectral tuning functionality for inhomogenous compensation; (4) efficient spin-state preparation and measurement for improved spin and optical properties. QSoC architecture supports full connectivity for quantum memory arrays in a set of different resonant frequencies and offers the possibility for further scaling the number of solid-state physical qubits via larger and denser QMC arrays and optical frequency multiplexing networking.
Color centers in diamonds have emerged as a leading solid-state platform for advancing quantum technologies, satisfying the DiVincenzo criteria and recently achieving a quantum advantage in secret key distribution. Recent theoretical works estimate that general-purpose quantum computing using local quantum communication networks will require millions of physical qubits to encode thousands of logical qubits, which presents a substantial challenge to the hardware architecture at this scale. To address the unanswered scaling problem, in this work, we first introduce a scalable hardware modular architecture "Quantum System-on-Chip" (QSoC) that features compact two-dimensional arrays "quantum microchiplets" (QMCs) containing tin-vacancy (SnV-) spin qubits integrated on a cryogenic application-specific integrated circuit (ASIC). We demonstrate crucial architectural subcomponents, including (1) QSoC fabrication via a lock-and-release method for large-scale heterogeneous integration; (2) a high-throughput calibration of the QSoC for spin qubit spectral inhomogenous registration; (3) spin qubit spectral tuning functionality for inhomogenous compensation; (4) efficient spin-state preparation and measurement for improved spin and optical properties. QSoC architecture supports full connectivity for quantum memory arrays in a set of different resonant frequencies and offers the possibility for further scaling the number of solid-state physical qubits via larger and denser QMC arrays and optical frequency multiplexing networking.
A central challenge in quantum networking is transferring quantum states between different physical modalities, such as between flying photonic qubits and stationary quantum memories. One implementation entails using spin–photon interfaces that combine solid-state spin qubits, such as color centers in diamond, with photonic nanostructures. However, while high-fidelity spin–photon interactions have been demonstrated on isolated devices, building practical quantum repeaters requires scaling to large numbers of interfaces yet to be realized. Here, we demonstrate integration of nanophotonic cavities containing tin-vacancy (SnV) centers in a photonic integrated circuit (PIC). Out of a six-channel quantum microchiplet (QMC), we find four coupled SnV-cavity devices with an average Purcell factor of ∼7. Based on system analyses and numerical simulations, we find with near-term improvements this multiplexed architecture can enable high-fidelity quantum state transfer, paving the way toward building large-scale quantum repeaters.
Diamond color centers are promising optically addressable solid-state spins that can be matter-qubits, mediate deterministic interaction between photons, and act as single photon emitters. Useful quantum computers will comprise millions of logical qubits. To become useful in constructing quantum computers, spin-photon interfaces must, therefore, become scalable and be compatible with mass-manufacturable photonics and electronics. Here, we demonstrate the heterogeneous integration of NV centers in nanodiamond with low-fluorescence silicon nitride photonics from a standard 180 nm CMOS foundry process. Nanodiamonds are positioned over predefined sites in a regular array on a waveguide in a single postprocessing step. Using an array of optical fibers, we excite NV centers selectively from an array of six integrated nanodiamond sites and collect the photoluminescence (PL) in each case into waveguide circuitry on-chip. We verify single photon emission by an on-chip Hanbury Brown and Twiss cross-correlation measurement, which is a key characterization experiment otherwise typically performed routinely with discrete optics. Our work opens up a simple and effective route to simultaneously address large arrays of individual optically active spins at scale, without requiring discrete bulk optical setups. This is enabled by the heterogeneous integration of NV center nanodiamonds with CMOS photonics.
Solid-state quantum light sources offer a scalable pathway for interfacing stationary spin qubits with flying photonic qubits, forming the backbone of future quantum networks. Telecom-band spin-photonic qubits, operating in the 1260-1675 nm wavelength range, are particularly well-suited for long-distance quantum communication due to minimal loss in standard optical fibers. Achieving scalability, however, hinges on fulfilling several stringent criteria: coherent spin-state control, deterministic and indistinguishable single-photon emission, and integration with nanophotonic structures that enhance radiative properties, such as lifetime, coherence, and photon indistinguishability. This study explores the state-of-the-art spin-photonic qubits across solid-state platforms, including diamond color centers, silicon carbide defect centers, quantum dots, and two-dimensional materials. Special attention is given to silicon-based emitters, particularly G, T, C- and Ci-centers, which promise monolithic integration with complementary metal-oxide-semiconductor (CMOS) technology and telecom-band operation. We classify these systems based on spin-photon interface availability, CMOS process compatibility, and emitter scalability. We also discuss recent advances in cavity quantum electrodynamics (cQED), including Purcell enhancement and quality factor engineering in integrated photonic (circuits) environments. The work highlights emerging demonstrations of quantum networking over metropolitan scales and outlines the trajectory toward chip-scale quantum photonic integrated circuits (QPICs). It combines deterministic emitter creation, coherent spin manipulation, and quantum information processing. These developments pave the way for global quantum networks, enabling secure communication, distributed quantum computing, and quantum-enhanced sensing.
Atom-like defects or color centers (CC's) in nanostructured diamond are a leading platform for optically linked quantum technologies, with recent advances including memory-enhanced quantum communication, multi-node quantum networks, and spin-mediated generation of photonic cluster states. Scaling to practically useful applications motivates architectures meeting the following criteria: C1 individual optical addressing of spin qubits; C2 frequency tuning of CC spin-dependent optical transitions; C3 coherent spin control in CC ground states; C4 active photon routing; C5 scalable manufacturability; and C6 low on-chip power dissipation for cryogenic operations. However, no architecture meeting C1-C6 has thus far been demonstrated. Here, we introduce a hybrid quantum system-on-chip (HQ-SoC) architecture that simultaneously achieves C1-C6. Key to this advance is the realization of piezoelectric strain control of diamond waveguide-coupled tin vacancy centers to meet C2 and C3, with ultra-low power dissipation necessary for C6. The DC response of our device allows emitter transition tuning by over 20 GHz, while the large frequency range (exceeding 2 GHz) enables low-power AC control. We show acoustic manipulation of integrated tin vacancy spins and estimate single-phonon coupling rates over 1 kHz in the resolved sideband regime. Combined with high-speed optical routing with negligible static hold power, this HQ-SoC platform opens the path to scalable single-qubit control with optically mediated entangling gates.