Errors is one major challenge in quantum computing. Presently, general error correction cannot be deployed practically. Other ways to reduce error rates require a precise knowledge about errors. This information is for example used in tooling to improve overall circuit error rates. Doing so can increase the sizes of practical circuits on current systems and therefore allow for larger hybrid high performance computing and quantum computing applications. Calibrations of quantum hardware are used to reduce error rates and report error rates. Because calibrations take a significant amount of time they are typically only run once per day. The error rates found are only valid during calibration as error rates drift, can change rapidly and by a factor of 2–3. In this paper, we show how to use experiments to precisely calculate estimates of error rates for quantum hardware. We show that by running generated structural test circuits, we can model error rates which are closer to the actual hardware error rates than the older calibration data. The produced estimates are vital inputs to several parts of a combined high performance computing and quantum computing system.
Errors is one major challenge in quantum computing. Presently, general error correction cannot be deployed practically. Other ways to reduce error rates require a precise knowledge about errors. This information is for example used in tooling to improve overall circuit error rates. Doing so can increase the sizes of practical circuits on current systems and therefore allow for larger hybrid high performance computing and quantum computing applications. Calibrations of quantum hardware are used to reduce error rates and report error rates. Because calibrations take a significant amount of time they are typically only run once per day. The error rates found are only valid during calibration as error rates drift, can change rapidly and by a factor of 2–3. In this paper, we show how to use experiments to precisely calculate estimates of error rates for quantum hardware. We show that by running generated structural test circuits, we can model error rates which are closer to the actual hardware error rates than the older calibration data. The produced estimates are vital inputs to several parts of a combined high performance computing and quantum computing system.
Despite significant progress in quantum computing in recent years, executing quantum circuits for practical problems remains challenging due to error-prone quantum hardware. Hence, quantum error correction becomes essential but induces significant overheads in qubits and execution time, often by orders of magnitude. Obviously, these overheads must be reduced. Since many quantum applications can tolerate some noise, end users can provide a maximum tolerated error, the error budget, to be considered during compilation and execution. This error budget, or, more precisely, its distribution, can be a key factor in achieving the overhead reduction. Conceptually, an errorcorrected quantum circuit can be divided into different parts that each have a specific purpose. Errors can happen in any of these parts and their errors sum up to the mentioned error budget-but how to distribute it among them actually constitutes a degree of freedom. This work is based on the idea that some of the circuit parts can compensate for errors more efficiently than others. Consequently, these parts should contribute more to satisfy the total error budget than the parts where it is more costly. However, this poses the challenge of finding optimal distributions. We address this challenge not only by providing general guidelines on distributing the error budget, but also a method that automatically determines resource-efficient distributions for arbitrary circuits by training a machine learning model on an accumulated dataset. The approach is evaluated by analyzing the machine learning model's predictions on so far unseen data, reducing the estimated space-time costs for more than 75% of the considered quantum circuits, with an average reduction of15.6%, including cases without improvement, and a maximum reduction of77.7%.
Due to very high projected error rates, large scale quantum computers will require substantial fault tolerance just to maintain a minimum level of reliability. We present tools to better analyze the performance of large, fault tolerant quantum computer designs. We find that current uses of quantum error correction are overly conservative in mitigating the impact of gate errors and negligent of other error sources in quantum data communication and memory.
We have developed circuit layout heuristics to generate detailed designs in trapped ion quantum computing technology. From these designs, we can extract much more accurate error models for a given application, including all gate, movement and idle errors on qubits. Using these extracted models, our flexible error simulation environment determines the overall failure probability of the design. Included in this simulation environment is a bit-parallel Monte Carlo technique that is 10 times faster than previous fault propagation simulations. This allows us to evaluate the reliability of designs that are an order of magnitude larger, in the same amount of time.
Using this analysis framework to verify reliability, we have developed a linear programming-based optimization for error correction which decreases overall circuit resources by an order of magnitude. In some cases, our optimization actually improves overall system reliability by removing error correction. We combine this optimization with judicious quantum error correcting code selection to provide efficient designs for large quantum arithmetic kernels used in Shor's factorization algorithm. We show our optimized designs perform 2x to 100x better than previous works in terms of probabilistic area-delay product. Additionally, the area of our layout of a 1024-bit factoring using Shor's algorithm is 64cm2, a substantial improvement compared to the 0.9m2 state-of-the-art design from prior work. A design size reduction by this amount will make fabricating such an application feasible much sooner.
Abstract Quantum computing has recently emerged as a novel paradigm for solving problems otherwise intractable on classical computers, yet the practical progress of quantum computers is severely impacted by noise, decoherence, and imperfect gate operations in Noisy Intermediate-Scale Quantum (NISQ) devices. Specific to IBM Quantum hardware, imperfections due to readout error, gate errors, and device drift, which depends on time, resolves limits for the accuracy of outputs from our algorithms. The mitigation strategies currently used, for example, Measurement Error Mitigation (MEM), Zero Noise Extrapolation (ZNE), and Clifford Data Regression (CDR), offer improvement over raw, unmitigated outputs, but they are static and not dynamic; the reduction of noise in within an NISQ device is temporal and can vary in patterns that are non-zero. In addition to this, using the conventional methods provides inconsistent and suboptimal results.This study will provide enhanced reliability with respect to performing quantum computation on IBM Quantum hardware with a unique mitigation framework that is adaptive and computationally efficient for a high-fidelity output. The problem taken on here is the failure of existing error mitigation strategies to provide adaptive noise compensation, as they assume a statically-distributed error, despite the performance-related characteristics already being documented in regards to calibration drift and variation over time.To achieve this, we propose a Hybrid Adaptive Error Mitigation (HAEM) approach that includes baseline measurement error mitigation and an additional correction layer that utilizes realtime calibration information, along with lightweight machine learning models. The approach can be broken down into three steps: (i) perform standard measurement error mitigation to reduce classical readout noise, (ii) execute compact calibration circuits, such as Bell states, GHZ states and Clifford benchmarks to capture then current error profile of the device, and (iii) use a lightweight machine learning model (having been trained on historical and newest calibration data) to dynamically change the mitigation weights applied for the target quantum algorithm. All implementation is done using Qiskit Runtime to ensure low-latency execution, and we completed experiments on both Qiskit Aer noisy simulators and IBM Quantum devices.Initial results suggest HAEM improved the outputs of quantum algorithms' fidelity compared to the unmitigated runs and the baseline measurement error mitigation (MEM) runs. On the noisy simulators, HAEM increased fidelity from a raw performance of 0.65 to 0.87, nearly a 34% improvement. In fairer hardware-like scenarios, fidelity-on-average was persistently 12% better than MEM, with nearly equal time duration for the additional adaptive measurements. The adaptive aspect of HAEM consistently supported subsequent calibration cycles of the device and was effective to continue providing fidelity improvements despite the static mitigation performance degrading.To sum up, the proposed HAEM framework is a modern and viable alternative for error mitigation which brings together the benefits of baseline approaches with corrections that are driven by fixed-function error-corrective, adaptive learning. As both learning-based and standard baseline approaches can only achieve fixed levels of performance, HAEM, through its use of noise mitigation both at execution time and through correlating it with standard data, provides a route towards reliable quantum computations on current IBM hardware. HAEM also presents a contribution to the NISQ error-resilient landscape, and however it is intended that it will continue to improve future applications of hybrid workflows of quantum and classical computation where error mitigation and resilience is important.
Quantum computing performance simulators are needed to provide practical metrics for the effectiveness of executing theoretical quantum information processing protocols on physical hardware. In this work, we present a tool to simulate the execution of fault-tolerant quantum computation by automating the tracking of common fault paths for error propagation through an encoded circuit block and quantifying the failure probability of each encoded qubit throughout the circuit. Our simulator runs a fault path counter on encoded circuit blocks to determine the probability that two or more errors remain on the encoded qubits after each block is executed, and it combines errors from all the encoded blocks to estimate performance metrics such as the logical qubit failure probability, the overall circuit failure probability, the number of qubits used, and the time required to run the overall circuit. Our technique efficiently estimates the upper bound of the error probability and provides a useful measure of the error threshold at low error probabilities where conventional Monte Carlo methods are ineffective. We describe a way of simplifying the fault-tolerant measurement process in the Steane code to reduce the number of error correction steps necessary. We present simulation results comparing the execution of quantum adders, which constitute a major part of Shor’s algorithm.
Abstract Hardware Error Outputs of Quantum Computing Not Reliable because of Hardware Calibration Drift, Measurement Noise, Gate Errors on NISQ Systems. Even though MEMs, ZNEs, and CDRs slightly increase output accuracy, they operate under the assumption of static noise, therefore they do not account for changing output of the NISQ devices in real-time. The limitations of MEMs, ZNEs, and CDRs can be overcome by using the Hybrid Adaptive Error Mitigation (HAEM) method proposed in this article that has the capability to combine baseline measurement-error mitigation with Real-time Calibration Circuits and Lightweight-Machine-learning algorithms for adaptive error-correcting and increasing the overall output integrity of quantum devices affected by fluctuations in noise. The application of the HAEM method will utilize Qiskit Runtime to develop, implement, and validate the Hybrid Adaptive Error Mitigation method through testing using controlled noisy simulated environments based on the characteristics of current advanced NISQ quantum computers. The results of the tests demonstrate the HAEM architecture provides a higher level of accuracy and fidelity than static and non-mitigated executions ("mitigated execution vs. HAEM execution"), providing an increase of up to thirty-four percent in fidelity under high-noise conditions with minimal computational overhead. The results demonstrate that the use of adaptive and data-driven mitigation techniques, like those used in the Hybrid Adaptive Error Mitigation method, are an efficient way to increase the accuracy of quantum computations.