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Journal of Computers Mechanical and Management

Design and Implementation of Multi-operative Reversible Gate for Even/Odd Parity Generators in Quantum based Technologies

Puspak Pain, Arindam Sadhu, Kunal Das, Maitreyi Ray Kanjilal

Published Sep 5, 2023• 5 citations
Publisher

Abstract

Quantum technology is graciously budding in nano-communication due to its properties and logical function, having the momentous prosperity of being reversible. It has gained an appeal to future-generation research owing to those sole aspects that may not be explored in the classical realm. A reliable nano-communication system utilizes varied error detection and correction techniques. Beyond low device density, authentic random number generation is a crucial issue in the cryptographic aspects of future communication architecture. To our knowledge, this is the innate study of an intriguing prospect: the design and implementation based on the lower level of power 'even/odd parity generator' using a single multi-operative reversible gate that has been achieved and functionally authenticated in the QCA nanotechnology, likewise in the IBMQ experience allied to quantum-based technologies. This breakthrough in nanotechnology and quantum-based technologies could have significant implications for blooming more efficient, secure communication systems in post-quantum cryptography.

DOI
10.57159/gadl.jcmm.2.4.23084

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Quantum technology is graciously budding in nano-communication due to its properties and logical function, having the momentous prosperity of being reversible. It has gained an appeal to future-generation research owing to those sole aspects that may not be explored in the classical realm. A reliable nano-communication system utilizes varied error detection and correction techniques. Beyond low device density, authentic random number generation is a crucial issue in the cryptographic aspects of future communication architecture. To our knowledge, this is the innate study of an intriguing prospect: the design and implementation based on the lower level of power 'even/odd parity generator' using a single multi-operative reversible gate that has been achieved and functionally authenticated in the QCA nanotechnology, likewise in the IBMQ experience allied to quantum-based technologies. This breakthrough in nanotechnology and quantum-based technologies could have significant implications for blooming more efficient, secure communication systems in post-quantum cryptography.
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The effects of quantum mechanics dominate nanoscale devices, where Moore’s law no longer holds true. Additionally, with the recent rapid development of quantum computers, the development of reversible gates to overcome the problems of energy and information loss and the nano-level quantum-dot cellular automata (QCA) technology to efficiently implement them are in the spotlight. In this study, a full adder-subtractor, a core operation of the arithmetic and logic unit (ALU), the most important hardware device in computer operations, is implemented as a circuit capable of reversible operation using QCA-based reversible gates. The proposed circuit consists of one reversible QCA gate and two Feynman gates and is designed as a multi-layer structure for efficient use of area and minimization of delay. The proposed circuit is tested on QCADesigner 2.0.3 and QCADesigner-E 2.2 and shows the best performance and lowest energy dissipation. In particular, it shows tremendous improvement rates of 180% and 562% in two representative standard design cost indicators compared to the best existing studies, and also shows the highest circuit average output polarization.
Abstract — Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, optical computing, DNA computing, digital signal processing (DSP), quantum dot cellular automata, communication, computer graphics. It is not possible to realize quantum computing without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. This paper provides the basic reversible logic gates, which in designing of more complex system having reversible circuits as a primitive component and which can execute more complicated operations using quantum computers. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. This paper presents the data relating to the primitive reversible gates which are available in literature and helps researches in designing higher complex computing circuits using reversible gates.
Quantum Dot Cellular Automata (QCA) is a rising innovation which seems to be a good competitor for the next generation of digital systems and widely utilized as a part of advanced frameworks.It is an appealing substitute to ordinary CMOS innovation because of diminutive size, faster speed, extremely scalable feature, ultralow power consumption and better switching frequency.The realization of quantum computation is not possible without reversible logic.Reversible logic has enlarged operations in quantum computation.Generally reversible computing is executed when system composes of reversible gates.It has numerous fields of use as applied science, quantum dot cellular automata as well as low power VLSI circuits, low power CMOS, digital signal processing, computer graphics.In this paper, the quantum implementation of primitive reversible gate has been presented.The proposed gates have been designed and simulated using QCADesigner.
Over the last few decades, research in reversible logic has increasingly become very popular and it is gaining greater momentum in the present word.Reversible logic has started finding concert applications in quantum computing, optical computing, nano-technology based system, low-power CMOS design, VLSI design.The principal objective of this work is to argue for quantum implementation of various reversible logic gates by using C-NOT, Controlled-V and Controlled-V + gates.The present work presents parallel adder/subtractor (with over flow detection), as well as Binary coded decimal adder (BCD) in terms of number of gates, garbage outputs, quantum cost, delay and hardware complexity compared to existing design.