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IEEE Journal of Solid-State Circuits

A Cryo-CMOS Low-Power Semi-Autonomous Transmon Qubit State Controller in 14-nm FinFET Technology

Sudipto Chakraborty, David J. Frank, Kevin Tien, Pat Rosno, Mark Yeck, Joseph A. Glick, R. P. Robertazzi, Ray Richetta, John F. Bulzacchelli, Devin Underwood, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv Joshi, Shawn D. Chambers, Scott Lekuch, Ken Inoue, Dorothy Wisnieff, Christian W. Baks, Donald S. Bethune, John Timmerwilke, Thomas Fox, Peilin Song, Blake R. Johnson, B. Gaucher, Daniel J. Friedman

Published Sep 20, 2022• 53 citations
Publisher

Abstract

A scalable, non-multiplexed cryogenic 14-nm FinFET quantum bit (qubit) state controller (QSC) for use in the semi-autonomous control of superconducting transmon qubits is reported. The QSC includes an augmented general-purpose digital processor that supports waveform generation and phase rotation operations combined with a low-power current-mode single sideband upconversion${I}/{Q}$mixer-based RF arbitrary waveform generator (AWG). Implemented in the 14-nm CMOS FinFET technology, the QSC generates control signals in its target 4.5–5.5-GHz-frequency range, achieving an spurious free dynamic range (SFDR) > 50 dB for a signal bandwidth of 500 MHz. With the controller operating in the 4 K stage of a cryostat and connected to a transmon qubit in the cryostat’s millikelvin stage, measured transmon$T_{1}$and$T_{2}$coherence times were 75.7 and 73$\mu \text{s}$, respectively, in each case comparable to results achieved using conventional room temperature (RT) controls. In further tests with transmons, a qubit-limited error rate of 7.76 × 10−4 per Clifford gate is achieved, again comparable to the results achieved using RT controls. The QSC’s maximum RF output power is −18 dBm, and power dissipation per qubit under active control is 23 mW.

DOI
10.1109/jssc.2022.3201775

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Building a large-scale quantum computer requires the co-optimization of both the quantum bits (qubits) and their control electronics. By operating the CMOS control circuits at cryogenic temperatures (cryo-CMOS), and hence in close proximity to the cryogenic solid-state qubits, a compact quantum-computing system can be achieved, thus promising scalability to the large number of qubits required in a practical application. This work presents a cryo-CMOS microwave signal generator for frequency-multiplexed control of 4 × 32 qubits (32 qubits per RF output). A digitally intensive architecture offering full programmability of phase, amplitude, and frequency of the output microwave pulses and a wideband RF front end operating from 2 to 20 GHz allow targeting both spin qubits and transmons. The controller comprises a qubit-phase-tracking direct digital synthesis (DDS) back end for coherent qubit control and a single-sideband (SSB) RF front end optimized for minimum leakage between the qubit channels. Fabricated in Intel 22-nm FinFET technology, it achieves a 48-dB SNR and 45-dB spurious-free dynamic range (SFDR) in a 1-GHz data bandwidth when operating at 3 K, thus enabling high-fidelity qubit control. By exploiting the on-chip 4096-instruction memory, the capability to translate quantum algorithms to microwave signals has been demonstrated by coherently controlling a spin qubit at both 14 and 18 GHz.
This Master thesis first reviews the current state of different kinds of qubit, providing a comprehensive analysis of the development progress and future directions of qubit control and readout schemes, which are key components of quantum computers. Special emphasis is placed on analyzing and designing the cryo-CMOS qubit state controller (QSC) chips for transmon qubits, followed by an analysis of the performance of the current state-of-the-art chips, summarizing the development directions and challenges faced. Subsequently, the progress and achievements of previous work, based on 28-nm CMOS, are presented. This work utilizes submodules that are more power-efficient and better suited to cryogenic temperature (CT). Based on our modeling work, we simulate the chip at both room temperature (RT) and 4 K. The results, showing an SFDR of 45 dB, an SNR of 58 dB, and a power consumption of 6 mW per channel under active control at 4 K, with minimal performance degradation compared to RT, suggest that this work is a strong candidate compared to the previous state of the art.
Error-corrected quantum computing is expected to require at least 105to 106physical qubits. Superconducting transmons, which are promising qubit candidates for scaled quantum computing systems, typically require individually tailored RF pulses in the 4-to-6 GHz range to manipulate their states, so scaling to 106qubits presents an enormous challenge. Providing a control line for every qubit from room temperature (RT) to the 10mK environment does not appear to be viable for a 106qubit system due to multiple factors, including RF loss, mechanical congestion, heat load, and connector unreliability. TDM cannot be used to reduce the number of control lines since all of the qubits may need to be activated at once (e.g., during quantum error correction (QEC) cycles). FDM has been proposed but is undesirable because extra tones can give rise to unwanted qubit excitations.