Low power high speed computing using rapid single flux quantum circuits

Mark H. Volkmann, Anubhav Sahu, Coenrad Johann Fourie +1 more

We present the design and results of experimental verification methods for ultra-low-power digital circuits based on the recently introduced energy-efficient single flux quantum (eSFQ) logic. Similar to another low-power SFQ logic, ERSFQ, eSFQ circuits make use of superconducting dc bias current dividers and thus avoid static power dissipation. As a result, per-gate power dissipation is reduced by two orders of magnitude as compared to conventional rapid single flux quantum and static power dissipation is zero. The eSFQ circuits are fabricated using the HYPRES standard 4.5 kA/cm2process. We integrate a low-pass analog-to-digital modulator with our eSFQ deserializer to enable testing at high speed. In this paper, we demonstrate the viability and performance metrics of eSFQ circuits through functional and high-speed tests. Specifically, we confirmed correct operation and present measured parameter margins.

Hannes Toepfer, Thomas Ortlepp

Akira Fujimaki, Takahiro Yamada, Masamitsu Tanaka +4 more

Fumihiro China, Tatsuya Narama, Naoki Takeuchi +3 more

We investigated interface circuits between rapid single-flux-quantum (RSFQ) circuits and adiabatic quantum-flux-parametron (AQFP) circuits for a high-speed and low-power hybrid computing system. In addition, the interface circuits allow us to use long-distance interconnections based on single-flux-quantum (SFQ) passive transmission lines between AQFP gates. The target frequency of interface circuits is several gigahertz. There are two types of interface circuits. The RSFQ/AQFP interface circuit, which transmits a signal from RSFQ circuits to AQFP gates, was realized by coupling an RSFQ toggle flip-flop (TFF) to an AQFP buffer gate. The simulated bias margins of the RSFQ TFF and the excitation current margin of the RSFQ/AQFP interface were 2.22 mA ± 24.7% and 1.71 mA ± 25.0%, respectively. The AQFP/RSFQ interface circuit, which transmits a signal from AQFP gates to RSFQ circuits, was designed by using a high-sensitive magnetically coupled dc/SFQ converter (MC-dc/SFQ) to detect an output current of an AQFP buffer gate. The simulated bias margins of the MC-dc/SFQ and the excitation current margin of the AQFP/RSFQ interface were 0.558 mA ± 20.5% and 1.95 mA ± 36.1%, respectively. We also fabricated and measured the interface circuits.

Oleg A. Mukhanov

Key digital circuits for signal processing with tens of gigahertz speed and a few microwatts power dissipation have been recently demonstrated using a simple, 2 /spl mu/m linewidth process. These are the fastest digital circuits reported to date. These circuits use novel rapid single flux quantum (RSFQ) technology that takes advantage of the fundamental properties of superconductivity. In this technology, data and clock are picosecond-long quantized voltage pulses corresponding to the transfer of single magnetic flux quanta, /spl Phisub 0/=h/2e=2 mVps. These SFQ pulses are regenerated at each gate and are processed by circuits comprised of overdamped Josephson junctions interconnected via microstrip inductances. The inherent internal memory of all RSFQ gates (primarily flip-flops), combined with high switching speed, makes serial, bit-pipelined circuit design advantageous. This paper presents experiments in RSFQ digital circuits, including an N/spl times/8b serial multiplier, and on-chip test systems based on RSFQ shift registers and on SFQ samplers. They enable test and study of RSFQ circuits at full GHz speed while communicating with semiconductor electronics at low speed.>

煕中 朴