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Cryogenics

Design infrastructure for Rapid Single Flux Quantum circuits

Hannes Toepfer, Thomas Ortlepp

Published Feb 26, 2009• 8 citations
Publisher
DOI
10.1016/j.cryogenics.2009.02.001

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The article describes the activities aimed at bringing superconductive high-speed electronics towards maturity.Integrated circuits based on the effects in superconducting materials have become feasible for some years already.The main focus lies on the so-called Rapid Single-Flux-Quantum (RSFQ) electronics which allows the combination of high operation frequencies (well above 20 GHz) with very low energy consumption when logical states are changed.Thus, this circuit technology exhibits a promising potential for realising energy-efficient modules for signal processing and computing.Recently, a dedicated design infrastructure has been developed in Europe.Closely associated is a foundry for digital RSFQ integrated circuits so that the fabrication of integrated circuits is viable.In the contribution, the basic features of the RSFQ circuit design are addressed with special emphasis on implementation on the wafer scale.
We investigated interface circuits between rapid single-flux-quantum (RSFQ) circuits and adiabatic quantum-flux-parametron (AQFP) circuits for a high-speed and low-power hybrid computing system. In addition, the interface circuits allow us to use long-distance interconnections based on single-flux-quantum (SFQ) passive transmission lines between AQFP gates. The target frequency of interface circuits is several gigahertz. There are two types of interface circuits. The RSFQ/AQFP interface circuit, which transmits a signal from RSFQ circuits to AQFP gates, was realized by coupling an RSFQ toggle flip-flop (TFF) to an AQFP buffer gate. The simulated bias margins of the RSFQ TFF and the excitation current margin of the RSFQ/AQFP interface were 2.22 mA ± 24.7% and 1.71 mA ± 25.0%, respectively. The AQFP/RSFQ interface circuit, which transmits a signal from AQFP gates to RSFQ circuits, was designed by using a high-sensitive magnetically coupled dc/SFQ converter (MC-dc/SFQ) to detect an output current of an AQFP buffer gate. The simulated bias margins of the MC-dc/SFQ and the excitation current margin of the AQFP/RSFQ interface were 0.558 mA ± 20.5% and 1.95 mA ± 36.1%, respectively. We also fabricated and measured the interface circuits.
Rapid single flux quantum (RSFQ) digital circuits have reached the level of medium- to large-scale of integration. At this level, existing design methodologies, developed specifically for RSFQ circuits, have become computationally inefficient. Applying mature semiconductor methodologies to the design of RSFQ circuits, one encounters substantial difficulties originating from the differences between both technologies. In this paper, a new design methodology aimed at large-scale RSFQ circuits is proposed. This methodology is based on a semiconductor semicustom design approach. An established design methodology for small-stale RSFQ digital circuits, based on circuit (junction-level) simulation and device parameter optimization, is used for the design of basic RSFQ cells. A library composed of about 20 basic RSFQ cells has been developed based on this approach. A novel design methodology for large-scale circuits, presented in this paper, is based on logic (gate-level) simulation and timing optimization. This methodology has been implemented around the Cadence integrated design environment and used successfully at the University of Rochester for the design of two large-scale digital circuits.