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Preliminary demonstration of a persistent Josephson phase-slip memory cell with topological protection

Nadia Ligato, Elia Strambini, Federico Paolucci, Francesco Giazotto

Published Jan 1, 2021• 19 citations
OpenAlex

Abstract

Abstract Superconducting computing promises enhanced computational power in both classical and quantum approaches. Yet, scalable and fast superconducting memories are not implemented. Here, we propose a fully superconducting memory cell based on the hysteretic phase-slip transition existing in long aluminum nanowire Josephson junctions. Embraced by a superconducting ring, the memory cell codifies the logic state in the direction of the circulating persistent current, as commonly defined in flux-based superconducting memories. But, unlike the latter, the hysteresis here is a consequence of the phase-slip occurring in the long weak link and associated to the topological transition of its superconducting gap. This disentangles our memory scheme from the large-inductance constraint, thus enabling its miniaturization. Moreover, the strong activation energy for phase-slip nucleation provides a robust topological protection against stochastic phase-slips and magnetic-flux noise. These properties make the Josephson phase-slip memory a promising solution for advanced superconducting classical logic architectures or flux qubits.

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Preliminary demonstration of a persistent Josephson phase-slip memory cell with topological protection

Nadia Ligato, Elia Strambini, Federico Paolucci +1 more

Abstract Superconducting computing promises enhanced computational power in both classical and quantum approaches. Yet, efficient schemes for scalable and fast superconducting memories are still missing. On the one hand, the large inductance required in magnetic flux-controlled Josephson memories impedes device miniaturization and scalability. On the other hand, schemes based on the ferromagnetic order to store information often degrades superconductivity, and limits the operation speed to the magnetization switching rate of a few GHz. Here, we overcome these limitations with a fully superconducting memory cell based on the hysteretic phase-slip transition existing in long aluminum nanowire Josephson junctions. The memory logic state is codified in the topological index of the junction providing a robust protection against stocastic phase slips and magnetic flux noise. Our direct and non-destructive read-out schemes, based on local DC or AC tunneling spectroscopy, ensure reduced dissipation (≤ 40 fW) thereby yielding a very low energy per bit read-out power consumption as low as ~ 10-24 J as estimated from the typical time response of the structure (≤ 30 ps). The memory, measured over several days, showed no evidence of information degradation up to ~1.1 K, i.e., ~85% of the critical temperature of aluminum. The ease of operation combined with remarkable performance elects the Josephson phase-slip memory as an attractive storage cell to be exploited in advanced superconducting classical logic architectures or flux qubits.

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Scalable memories that can match the speeds of superconducting logic circuits have long been desired to enable a superconducting computer. A superconducting loop that includes a Josephson junction can store a flux quantum state in picoseconds. However, the requirement for the loop inductance to create a bistate hysteresis sets a limit on the minimal area occupied by a single memory cell. Here, we present a miniaturized superconducting memory cell based on a three-dimensional (3D) Nb nano-superconducting quantum interference device (nano-SQUID). The major cell area here fits within an 8 × 9 μm 2 rectangle with a cross-selected function for memory implementation. The cell shows periodic tunable hysteresis between two neighboring flux quantum states produced by bias current sweeping because of the large modulation depth of the 3D nano-SQUID (∼66%). Furthermore, the measured current-phase relations (CPRs) of nano-SQUIDs are shown to be skewed from a sine function, as predicted by theoretical modeling. The skewness and the critical current of 3D nano-SQUIDs are linearly correlated. It is also found that the hysteresis loop size is in a linear scaling relationship with the CPR skewness using the statistics from characterization of 26 devices. We show that the CPR skewness range of π/4–3π/4 is equivalent to a large loop inductance in creating a stable bistate hysteresis for memory implementation. Therefore, the skewed CPR of 3D nano-SQUID enables further superconducting memory cell miniaturization by overcoming the inductance limitation of the loop area.

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Abstract Superconducting circuits represent a versatile playground to explore novel quantum phenomena and a platform to realize quantum bits (qubits). Superconducting qubits hinge on the coherent tunneling of Cooper pairs across the insulating barrier of a Josephson junction. This qubit implementation is, however, plagued with the variability of the fabricated junction, along with the need for magnetic tunability of the qubit transition frequency. Alternatively, a dual to the Josephson effect—referred to as quantum phase slips—allows for a coherent coupling of flux states and has been used to build phase-slip qubits. In this paper, we propose coupling flux states of a superconducting ring using a bias voltage. By solving the time-dependent Ginzburg–Landau equations, we demonstrate that the bias voltage locally suppresses the density of Cooper pairs, thereby forming a weak link where phase slips occur. Moreover, we show that a voltage-biased superconducting ring serves as an electrically-controlled magnetic memory. The work presented in this paper is an important step towards realizing electrically-tunable superconducting devices, such as qubits and SQUIDs.

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Abstract A superconducting loop stores persistent current without any ohmic loss, making it an ideal platform for energy efficient memories. Conventional superconducting memories use an architecture based on Josephson junctions (JJs) and have demonstrated access times less than 10 ps and power dissipation as low as 10 −19 J. However, their scalability has been slow to develop due to the challenges in reducing the dimensions of JJs and minimizing the area of the superconducting loops. In addition to the memory itself, complex readout circuits require additional JJs and inductors for coupling signals, increasing the overall area. Here, we have demonstrated a superconducting memory based solely on lithographic nanowires. The small dimensions of the nanowire ensure that the device can be fabricated in a dense area in multiple layers, while the high kinetic inductance makes the loop essentially independent of geometric inductance, allowing it to be scaled down without sacrificing performance. The memory is operated by a group of nanowire cryotrons patterned alongside the storage loop, enabling us to reduce the entire memory cell to 3 μ m × 7 μ m in our proof-of-concept device. In this work we present the operation principles of a superconducting nanowire memory (nMem) and characterize its bit error rate, speed, and power dissipation.

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Johan E. Mooij, C. J. P. M. Harmans

In thin superconducting wires, phase-slip by thermal activation near the critical temperature is a well-known effect. It has recently become clear that phase-slip by quantum tunnelling through the energy barrier can also have a significant rate at low temperatures. In this paper, it is suggested that quantum phase-slip can be used to realize a superconducting quantum bit without Josephson junctions. A loop containing very thin nanofabricated wire is biased with an externally applied magnetic flux of half a flux quantum, resulting in two states with opposite circulating current and equal energy. Quantum phase-slip should provide coherent coupling between these two macroscopic states. Numbers are given for a wire of amorphous niobium-silicon that can be fabricated with advanced electron beam lithography.

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Demonstration of a Josephson vortex-based memory cell with microwave energy-efficient readout

Dmitrii S. Kalashnikov, Vsevolod I. Ruzhickiy, Andrey G. Shishkin +5 more

Abstract The ongoing progress of superconducting logic systems with Josephson junctions as base elements requires the development of compatible cryogenic memory. Long enough junctions subject to magnetic field host quantum phase 2 π -singularities—Josephson vortices. Here, we report the realization of the superconducting memory cell whose state is encoded by the number of present Josephson vortices. By integrating the junction into a coplanar resonator and by applying a microwave excitation well below the critical current, we are able to control the state of the system in an energy-efficient and non-destructive manner. The memory effect arises due to the presence of the natural edge barrier for Josephson vortices. The performance of the device is evaluated, and the routes for creating scalable cryogenic memories directly compatible with superconducting microwave technologies are discussed.

arXiv:2308.09995•Communications Physics•Mar 11, 2024•13 citations
Abstract Superconducting computing promises enhanced computational power in both classical and quantum approaches. Yet, scalable and fast superconducting memories are not implemented. Here, we propose a fully superconducting memory cell based on the hysteretic phase-slip transition existing in long aluminum nanowire Josephson junctions. Embraced by a superconducting ring, the memory cell codifies the logic state in the direction of the circulating persistent current, as commonly defined in flux-based superconducting memories. But, unlike the latter, the hysteresis here is a consequence of the phase-slip occurring in the long weak link and associated to the topological transition of its superconducting gap. This disentangles our memory scheme from the large-inductance constraint, thus enabling its miniaturization. Moreover, the strong activation energy for phase-slip nucleation provides a robust topological protection against stochastic phase-slips and magnetic-flux noise. These properties make the Josephson phase-slip memory a promising solution for advanced superconducting classical logic architectures or flux qubits.
Abstract Superconducting computing promises enhanced computational power in both classical and quantum approaches. Yet, efficient schemes for scalable and fast superconducting memories are still missing. On the one hand, the large inductance required in magnetic flux-controlled Josephson memories impedes device miniaturization and scalability. On the other hand, schemes based on the ferromagnetic order to store information often degrades superconductivity, and limits the operation speed to the magnetization switching rate of a few GHz. Here, we overcome these limitations with a fully superconducting memory cell based on the hysteretic phase-slip transition existing in long aluminum nanowire Josephson junctions. The memory logic state is codified in the topological index of the junction providing a robust protection against stocastic phase slips and magnetic flux noise. Our direct and non-destructive read-out schemes, based on local DC or AC tunneling spectroscopy, ensure reduced dissipation (≤ 40 fW) thereby yielding a very low energy per bit read-out power consumption as low as ~ 10-24 J as estimated from the typical time response of the structure (≤ 30 ps). The memory, measured over several days, showed no evidence of information degradation up to ~1.1 K, i.e., ~85% of the critical temperature of aluminum. The ease of operation combined with remarkable performance elects the Josephson phase-slip memory as an attractive storage cell to be exploited in advanced superconducting classical logic architectures or flux qubits.
Scalable memories that can match the speeds of superconducting logic circuits have long been desired to enable a superconducting computer. A superconducting loop that includes a Josephson junction can store a flux quantum state in picoseconds. However, the requirement for the loop inductance to create a bistate hysteresis sets a limit on the minimal area occupied by a single memory cell. Here, we present a miniaturized superconducting memory cell based on a three-dimensional (3D) Nb nano-superconducting quantum interference device (nano-SQUID). The major cell area here fits within an 8 × 9 μm 2 rectangle with a cross-selected function for memory implementation. The cell shows periodic tunable hysteresis between two neighboring flux quantum states produced by bias current sweeping because of the large modulation depth of the 3D nano-SQUID (∼66%). Furthermore, the measured current-phase relations (CPRs) of nano-SQUIDs are shown to be skewed from a sine function, as predicted by theoretical modeling. The skewness and the critical current of 3D nano-SQUIDs are linearly correlated. It is also found that the hysteresis loop size is in a linear scaling relationship with the CPR skewness using the statistics from characterization of 26 devices. We show that the CPR skewness range of π/4–3π/4 is equivalent to a large loop inductance in creating a stable bistate hysteresis for memory implementation. Therefore, the skewed CPR of 3D nano-SQUID enables further superconducting memory cell miniaturization by overcoming the inductance limitation of the loop area.
Abstract Superconducting circuits represent a versatile playground to explore novel quantum phenomena and a platform to realize quantum bits (qubits). Superconducting qubits hinge on the coherent tunneling of Cooper pairs across the insulating barrier of a Josephson junction. This qubit implementation is, however, plagued with the variability of the fabricated junction, along with the need for magnetic tunability of the qubit transition frequency. Alternatively, a dual to the Josephson effect—referred to as quantum phase slips—allows for a coherent coupling of flux states and has been used to build phase-slip qubits. In this paper, we propose coupling flux states of a superconducting ring using a bias voltage. By solving the time-dependent Ginzburg–Landau equations, we demonstrate that the bias voltage locally suppresses the density of Cooper pairs, thereby forming a weak link where phase slips occur. Moreover, we show that a voltage-biased superconducting ring serves as an electrically-controlled magnetic memory. The work presented in this paper is an important step towards realizing electrically-tunable superconducting devices, such as qubits and SQUIDs.
Abstract A superconducting loop stores persistent current without any ohmic loss, making it an ideal platform for energy efficient memories. Conventional superconducting memories use an architecture based on Josephson junctions (JJs) and have demonstrated access times less than 10 ps and power dissipation as low as 10 −19 J. However, their scalability has been slow to develop due to the challenges in reducing the dimensions of JJs and minimizing the area of the superconducting loops. In addition to the memory itself, complex readout circuits require additional JJs and inductors for coupling signals, increasing the overall area. Here, we have demonstrated a superconducting memory based solely on lithographic nanowires. The small dimensions of the nanowire ensure that the device can be fabricated in a dense area in multiple layers, while the high kinetic inductance makes the loop essentially independent of geometric inductance, allowing it to be scaled down without sacrificing performance. The memory is operated by a group of nanowire cryotrons patterned alongside the storage loop, enabling us to reduce the entire memory cell to 3 μ m × 7 μ m in our proof-of-concept device. In this work we present the operation principles of a superconducting nanowire memory (nMem) and characterize its bit error rate, speed, and power dissipation.
In thin superconducting wires, phase-slip by thermal activation near the critical temperature is a well-known effect. It has recently become clear that phase-slip by quantum tunnelling through the energy barrier can also have a significant rate at low temperatures. In this paper, it is suggested that quantum phase-slip can be used to realize a superconducting quantum bit without Josephson junctions. A loop containing very thin nanofabricated wire is biased with an externally applied magnetic flux of half a flux quantum, resulting in two states with opposite circulating current and equal energy. Quantum phase-slip should provide coherent coupling between these two macroscopic states. Numbers are given for a wire of amorphous niobium-silicon that can be fabricated with advanced electron beam lithography.
Abstract The ongoing progress of superconducting logic systems with Josephson junctions as base elements requires the development of compatible cryogenic memory. Long enough junctions subject to magnetic field host quantum phase 2 π -singularities—Josephson vortices. Here, we report the realization of the superconducting memory cell whose state is encoded by the number of present Josephson vortices. By integrating the junction into a coplanar resonator and by applying a microwave excitation well below the critical current, we are able to control the state of the system in an energy-efficient and non-destructive manner. The memory effect arises due to the presence of the natural edge barrier for Josephson vortices. The performance of the device is evaluated, and the routes for creating scalable cryogenic memories directly compatible with superconducting microwave technologies are discussed.