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Japanese Journal of Applied Physics

Ion shuttling method for long-range shuttling of trapped ions in MEMS-fabricated ion traps

Minjae Lee, Junho Jeong, Yunjae Park, Changhyun Jung, Taehyun Kim, Dong‐il Cho

Published Jan 14, 2021• 10 citations
Publisher

Abstract

Abstract A large-scale ion trap array fabricated using the microelectromechanical systems (MEMS) technology is expected to be a promising device for building a practical quantum computer. Shuttling trapped ions is essential for operating scalable ion trap structures. This paper proposes an ion shuttling method for a MEMS-fabricated surface ion trap. Change of secular frequency of trapping potential can cause heating and subsequent loss of ions. Therefore, direct current voltage sets to form uniform ion trapping potentials around the ions while shuttling are calculated by simulations. A 32-channel digital-to-analog converter system is developed to apply the calculated voltage sets to the electrodes of the MEMS-fabricated surface ion trap. The shuttling process is experimented using trapped 174Yb+ ions. The successful round trip of the ion for 1920 μm is demonstrated using the developed approach.

DOI
10.35848/1347-4065/abdabb

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Abstract A large-scale ion trap array fabricated using the microelectromechanical systems (MEMS) technology is expected to be a promising device for building a practical quantum computer. Shuttling trapped ions is essential for operating scalable ion trap structures. This paper proposes an ion shuttling method for a MEMS-fabricated surface ion trap. Change of secular frequency of trapping potential can cause heating and subsequent loss of ions. Therefore, direct current voltage sets to form uniform ion trapping potentials around the ions while shuttling are calculated by simulations. A 32-channel digital-to-analog converter system is developed to apply the calculated voltage sets to the electrodes of the MEMS-fabricated surface ion trap. The shuttling process is experimented using trapped 174Yb+ ions. The successful round trip of the ion for 1920 μm is demonstrated using the developed approach.
Trapped ions in Paul traps (radio frequency ion traps) are a promising candidate for the realization of a quantum computer. To date, experimental demonstrations of quantum computing and information processing with trapped ions have been limited to small numbers of quantum bits (qubits). The most prominent challenge to realise ion-trap quantum computation is to scale the system and control a large number of trapped ions coherently. Surface-electrode ion trap designs which are amenable to various microfabrication techniques offer a path to achieve this. In this work, design, fabrication and key operations of two types of surface-electrode ion traps, i.e. a Y-junction trap and a two-dimensional (2D) hexagonal lattice trap developed towards scaling ion-trap architectures, are presented. The steps involved in the fabrication of the ion-trap devices included photolithography, wet etch (hydrofluoric acid etch) and dry etch (deep reactive ion and inductively coupled plasma etching), and metal evaporation. The devices were fabricated on SOI substrates with different buried oxide thicknesses (i.e. 5 µm and 10 µm) and different metals for the trap electrodes (i.e. gold and aluminium). An extremely high-breakdown voltage up to 1 kV was measured in vacuum for the SOI-built test devices with a 10 µm-thick buried oxide formed by oxide film-to-oxide film bonding process. This is attributed to the deep V-shaped undercut profile of the buried oxide layer which resulted in a large breakdown path length, and so mitigating surface breakdown effects. Owing to the V-shaped undercut profile, the surface breakdown voltage was improved by 15% for the devices fabricated on SOI substrates with a 10 µm-thick buried oxide. In the first experiment, the demonstration of ytterbium (174Yb+) ion trapping in the 2D hexagonal lattice trap is achieved with a relatively long lifetime of a laser-cooled ion up to 90 minutes and ≤ 5 minutes without cooling in ultra-high vacuum system. The 2D lattice trap design allows for reliable trapping of 2D ion lattices, rudimentary shuttling between lattice sites and deterministic introducing of defects into the ion lattice. Based on all these abilities, such a 2D lattice trap with the predicted reduction of lattice spacing down to 32 µm can be configured as a versatile architecture for 2D quantum simulations with trapped ions. In the second experiment, microparticle trapping in the 2D lattice trap, performed in air, is achieved with the longest trapping lifetime of 60 minutes. Both gold and aluminium-coated electrodes also lead to comparable trapping performances. Furthermore, the in situ levitation of microparticles is successfully demonstrated at the maximum levitation height of 30 µm. This ability provides additional control on the trapping height which increases the overall functionality of the 2D lattice trap.
Ion traps can provide both physical implementation of quantum information processing and direct observation of quantum systems. Recently, surface ion traps have been developed using microfabrication technologies and are considered to be a promising platform for scalable quantum devices. This paper presents detailed guidelines for designing the electrodes of surface ion traps. First, we define and explain the key specifications including trap depth, q-parameter, secular frequency, and ion height. Then, we present a numerical-simulation-based design procedure, which involves determining the basic assumptions, determining the shape and size of the chip, designing the dimensions of the radio frequency (RF) electrode, and analyzing the direct current (DC) control voltages. As an example of this design procedure, we present a case study with tutorial-like explanations. The proposed design procedure can provide a practical guideline for designing the electrodes of surface ion traps.
Abstract Scaling trapped-ion quantum computing will require robust trapping of at least hundreds of ions over long periods, while increasing the complexity and functionality of the trap itself. Symmetric three-dimensional (3D) structures enable high trap depth, but microfabrication techniques are generally better suited to planar structures that produce less ideal conditions for trapping. We present an ion trap fabricated on stacked eight-inch wafers in a large-scale micro-electro-mechanical system microfabrication process that provides reproducible traps at a large volume. Electrodes are patterned on the surfaces of two opposing wafers bonded to a spacer, forming a 3D structure with 2.5 μm standard deviation in alignment across the stack. We implement a design achieving a trap depth of 1 eV for a 40Ca+ ion held at 200 μm from either electrode plane. We characterize traps, achieving measurement agreement with simulations to within ±5% for mode frequencies spanning 0.6–3.8 MHz, and evaluate stray electric field across multiple trapping sites. We measure motional heating rates over an extensive range of trap frequencies, and temperatures, observing 40 phonons/s at 1 MHz and 185 K. This fabrication method provides a highly scalable approach for producing a new generation of 3D ion traps.
The prospect of building a quantum information processor underlies many recent advances ion trap fabrication techniques. Potentially, a quantum computer could be constructed from a large array of interconnected ion traps. We report on a micrometer-scale ion trap, fabricated from bulk silicon using micro-electromechanical systems (MEMS) techniques. The trap geometry is relatively simple in that the electrodes lie in a single plane beneath the ions. In such a trap we confine laser-cooled 24Mg+ ions approximately 40 microns above the surface. The fabrication technique and planar electrode geometry together make this approach amenable to scaling up to large trap arrays. In addition we observe that little laser cooling light is scattered by the electrodes.
We report on the design and testing of an array of Penning ion traps made from printed circuit board. The system enables fast shuttling of ions from one trapping zone to another, which could be of use in quantum information processing. We describe simulations carried out to determine the optimal potentials to be applied to the trap electrodes for enabling this movement. The results of a preliminary experiment with a cloud of laser cooled calcium ions demonstrate a round-trip shuttling efficiency of up to 75%.