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Superconducting digital circuits without inductors

Igor I. Soloviev, Vsevolod I. Ruzhickiy, Sergey V. Bakurskiy, N. V. Klenov, M. Yu. Kupriyanov, A. A. Golubov, Olga V. Skryabina, Vasily S. Stolyarov

Published Nov 11, 2020• 0 citations
OpenAlex

Abstract

Magnetic flux quantization in superconductors allows the implementation of fast and energy-efficient digital superconducting circuits. However, the information representation in magnetic flux severely limits their functional density presenting a long-standing problem. Here we introduce a concept of superconducting digital circuits that do not utilize magnetic flux and have no inductors. We argue that neither the use of geometric nor kinetic inductance is promising for the deep scaling of superconducting circuits. The key idea of our approach is the utilization of bistable Josephson structures allowing the presentation of information in Josephson energy. Since the proposed circuits functionally rely on Josephson junctions only, they can be called all-Josephson junction (all-JJ) circuits. We consider the design methodology of the all-JJ circuits utilizing recently developed $2\phi$ Josephson junctions for simplicity, though the bistability can be obtained with the other types of magnetic junctions like $\phi$- or $0-\pi$, or by using combinations of conventional 0- and $\pi$-junctions. Besides some broadly used basic cells, we present an all-JJ 8-bit parallel adder confirming the applicability of the proposed approach to the design of complex logic circuits.

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Magnetic flux quantization in superconductors allows the implementation of fast and energy-efficient digital superconducting circuits. However, the information representation in magnetic flux severely limits their functional density presenting a long-standing problem. Here we introduce a concept of superconducting digital circuits that do not utilize magnetic flux and have no inductors. We argue that neither the use of geometric nor kinetic inductance is promising for the deep scaling of superconducting circuits. The key idea of our approach is the utilization of bistable Josephson structures allowing the presentation of information in Josephson energy. Since the proposed circuits functionally rely on Josephson junctions only, they can be called all-Josephson junction (all-JJ) circuits. We consider the design methodology of the all-JJ circuits utilizing recently developed 2ϕ2\phi2ϕ Josephson junctions for simplicity, though the bistability can be obtained with the other types of magnetic junctions like ϕ\phiϕ- or 0−π0-\pi0−π, or by using combinations of conventional 0- and π\piπ-junctions. Besides some broadly used basic cells, we present an all-JJ 8-bit parallel adder confirming the applicability of the proposed approach to the design of complex logic circuits.
Magnetic flux quantization in superconductors allows the implementation of fast and energy-efficient digital superconducting circuits. However, information representation in magnetic flux severely limits the functional density and is a long-standing problem. Here, we introduce the concept of superconducting digital circuits that do not utilize magnetic flux and have no inductors. We argue that neither the use of geometric nor kinetic inductance is promising for the scaling down of superconducting circuits. The key idea of our approach is the utilization of bistable Josephson junctions, allowing the representation of information through the Josephson energy. Since the proposed circuits are composed only of Josephson junctions, they can be called all-Josephson junction (all-JJ) circuits. We present a methodology for the design of circuits consisting of conventional and bistable junctions. We analyze the principles of the circuit's functioning, ranging from simple logic cells to an 8-bit parallel adder. The utilization of bistable junctions in the all-JJ circuits is promising for the simplification of schematics and a decrease of the JJ count, leading to space efficiency.
The lack of dense, fast, energy efficient memory has been the main detractor for multiple superconducting digital projects in the past. Recently, fundamental physics research in superconductor-ferromagnet thin-film tunnel structures created a new opportunity to solve this long-standing problem. Superconductivity and ferromagnetism, two deeply antagonistic electronic properties, can co-exist in form of Magnetic Josephson Junctions (MJJs). The superconducting-ferromagnetic MJJs are electrically compatible with traditional superconductor-insulator-superconductor (SIS) Josephson junctions (JJs) used for digital energy-efficient single flux quantum (eSFQ/ERSFQ) circuits. Both MJJ and JJ circuits have similar fabrication process and can be integrated on a single chip. As a result, a combination of MJJs and JJs can be used to form addressable memory cells, energy-efficient memory periphery circuits and programmable logic elements. In this paper, we present the test results of superconductor-insulator-ferromagnet-superconductor (SIFS) MJJs showing their applicability for superconducting spintronic memory and digital circuits.
Single flux quantum (SFQ) technology has garnered significant attention due to its low switching power and high operational speed. Researchers have been actively pursuing more advanced devices and technologies to further reduce the reliance on inductors, bias, and dynamic power. Recently, innovative magnetic Josephson junction devices have emerged, enhancing the field of superconductor electronics logic. This article introduces a novel cell library design that relies entirely on Josephson junctions, showing promising potential for eliminating the need for inductors in conventional SFQ cells. This results in a 55% reduction in cell size and an 80% decrease in both static and dynamic power consumption. The proposed library implements a half flux quantum logic, where each pulse duration is half that of a SFQ pulse. This article presents the schematics of the basic cells, emphasizing critical circuit parameters and their margins. In addition, it examines layout blueprints, showcasing the advantageous area-saving characteristics of the proposed design.
The all-JJ logic family is a promising area and power efficient, scalable single flux quantum (SFQ) technology for application to exascale supercomputers. All-JJ superconductive logic is based on a superconductor-ferromagnet-superconductor (SFS) bistable JJ, enabling nanometer feature sizes in VLSI complexity superconductive systems. In this paper, a mechanical analogy is proposed to describe the dynamic behavior of these bistable JJs. Novel all-JJ logic gates, such as TFF, DFF, OR, AND, and NOT gates, are presented here. All-JJ circuits are composed of bistable JJs, standard JJs, and bias currents, not requiring large inductors within the storage loops. All-JJ logic cells exhibit less delay and power than standard SFQ cells with the same critical current density. All-JJ systems can operate at high frequencies due to the small capacitance of the SFS JJ. A complex all-JJ circuit from the suite of ISCAS'85 benchmark circuits is also characterized. This complex all-JJ circuit exhibits less delay and power as compared to standard SFQ logic. The bias current in a conventional benchmark circuit and all-JJ benchmark circuit is, respectively, 22 mA and 13 mA. The delay of each cell within the conventional benchmark circuit and all-JJ benchmark circuit is, respectively, approximately 20 and 8 ps. A parasitic inductance in series with the JJs disturbs the current distribution within the all-JJ circuits while degrading the margins. To suppress the effects of this parasitic inductance on SFS JJs, small linear inductors are added to manage the current distribution and improve the parameter margins.
A bistable superconducting quantum interference device (SQUID) exclusively comprising Josephson junctions (JJs) is proposed. The design integrates two 2Φ2 \Phi2Φ-JJs within the loop structure, while the state of the SQUID is monitored through a conventional 2π2 \pi2π-periodic JJ\mathbf{J J}JJ (0\mathbf{0}0-JJ). This configuration eliminates the need for geometric inductors, leveraging the nonlinear phase dynamics for bistability. Extensive simulations confirm robust bistable operation under controlled external flux bias, positioning the proposed SQUID as an area-efficient building block for superconducting memory cells, sensors for various applications, and SFQ-compatible logic elements.
Abstract Superconductor Electronics (SCE) is a fast and power-efficient technology with great potential for overcoming conventional CMOS electronics’ scaling limits. Nevertheless, the primary challenge confronting SCE today is its integration level, which lags several orders of magnitude behind CMOS circuits. In this study, we have innovated and simulated a novel logic family grounded in the principles of phase shifts occurring in 0 and π Josephson junctions. The fast phase logic (FPL) eliminates the need for large inductor loops and shunt resistances by combining the half-flux and phase logic. Therefore, the Josephson junction (JJ) area only limits the integration density. The cells designed with this paradigm are fast, and the clock-to-Q delay for logic cells is about 4ps. While maintaining over 50% parameter margins for wiring cells. This logic is power efficient and can increase the integration by at least 100×in the SCE chips.