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Design of a superconductor-to-semiconductor interface circuit for high data rates

Thomas Ortlepp, R. Schwemlein, J. Flamm, S. Wünsch, E. Crocoll, Edward W. Toepfer, Friedrich Uhlmann, M. Siegel

Published Jan 1, 2004• 1 citation
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Interface circuits are the key components that enable the hybrid integration of superconductor and semiconductor digital electronics. The design requirements of superconductor-semiconductor interface circuits vary depending on the application, such as high-performance classical computing, superconducting quantum computing, and digital signal processing. In this survey, various interface circuits are categorized based on the working principle and structure. The superconducting output drivers are explored, which are capable of converting and amplifying, e.g., single flux quantum (SFQ) voltage pulses, to voltage levels that semiconductor circuits can process. Several trade-offs between circuit- and system-level design parameters are examined. Accordingly, parameters such as the data rate, output voltage, power dissipation, layout area, thermal/heat load of cryogenic cables, and bit-error rate are considered.
Superconductor-semiconductor interface circuits are integral part of connecting cryogenic classical and quantum computing systems with the room temperature electronics. Due to the cooling power constraints of cryogenic setups, the number of data transmission channels between temperature stages is often limited by the heat load of cables and connectors. As a result, a high data rate (throughput) per channel is desired for large-scale computing systems. The state-of-the-art superconductor-semiconductor interface circuits use a binary data format. In this work, a novel interface circuit is proposed that produces signals with pulse-amplitude modulation (PAM). As a case study, a PAM-4 SQUID (superconducting quantum interference device) stack interface circuit is developed. With four output voltage levels, the effective data rate can be doubled while keeping the same operating frequency. Alternatively, the number of cryogenic cables can be reduced by two times as compared to the conventional binary data links.
Superconductor electronics for high-performance computing and high-speed analog-to-digital converters requires multi-channel digital data links. Most difficult is the amplification of the weak signals from the superconductor circuit to the volt level of semiconductor electronics. We developed a hybrid digital interface based on a Josephson latching driver, the so-called Suzuki stack, and a clocked CMOS comparator. The input can be directly triggered by a single flux quantum pulse and the output provides a 1 V CMOS-level signal. In contrast to existing systems, our interface is optimized for ultra-low-power consumption to enable its application for parallel multi-bit data interfaces. We provide evaluation of various types of Suzuki stacks and various CMOS comparators. We present experimental data on the delay of the overall hybrid interface and the total power consumption. The bit-error rate has been measured to be below 10-12. We will discuss the trade-off among circuit robustness, speed, and power consumption.