Design, simulation, fabrication and measurement of a superconducting microwave resonator allowing the application of a DC bias through a symmetry point

Abstract

Superconducting microwave resonators based on coplanar waveguides (CPWs), which allow for on-chip implementation, have a wide variety of uses, from the coupling of qubits to the detection of photons from interstellar clouds. With the integration of a bias circuitry, the already versatile resonator will become even more so. However, applying a DC voltage or current bias to the resonator without significantly degrading its quality factor Q is no trivial task. One of the first superconducting microwave resonators with the ability to allow for the application of a DC bias, made use of symmetry points. In order to not rely on those symmetry points, our group came up with a different design that used a shunted capacitor instead. However, this design needs a more extensive and in particular more complicated fabrication process. As the groups focus is now completely away from the original design, we go back in this thesis, to honestly evaluate such a resonator by applying a bias to its center. We present a design with the cavity length l to be a full wavelength (l = λ) terminated on both ends to ground, fed in by a capacitively coupled AC-feedline at λ/4 and a DC-bias line at its center (λ/2). After the first fabrication trial we were unable to successfully judge the performance of the microwave resonator as it suffered from bad internal loss, leading to a low internal Q ~ 300 at 4 K. The only thing that this showed us, is that its design is perhaps not as straightforward. On the other hand, interesting results specific to the design were obtained from QUCS simulations (using a combination of lumped and distributed elements). These simulations showed that the quality of the resonator is highly sensitive to the position of its galvanically connected bias line, with respect to the center of the cavity (voltage node). Where Qint drops down to 10 % of its maximum for < 0.1 mm (= l/320) away from the center. Furthermore, we saw that asymmetry in the ports causes the maximum Qint (voltage node) to be off-center by 9 μm, and that adding an extra feedline in symmetry to the existing one puts it back on-center. Demonstrating the voltage node susceptibility to asymmetries of the cavity mode. Despite the unpromising signs the results show, suggestions have been put forward about better isolation of the bias line that have the potential to still make the design attractive. While these isolations still baring the traits of a faster and less complex fabrication.