Superconducting quantum computers are rapidly reaching scales where bottlenecks to scaling arise from the practical aspects of the fabrication process. To improve quantum computer performance, implementation technology that guarantees the scalability of the number of qubits is essential. Increasing the degrees of freedom in routing by 2.5-dimensional implementation is important for realizing circuit scalability. We report an implementation technology to overcome the scaling bottlenecks using a reliable connection qubit with a demonstration of quantum annealing. The method comprises interconnection based on quantum annealing using a superconducting flux qubit, precise coupling status control, and flip-chip bonding. We perform experiments and simulations with a proof-of-concept demonstration of qubit coupling via interconnection using a flux qubit. The coupling status is strictly controllable by quantum annealing. A low-temperature flip-chip bonding technology is introduced for the 2.5-dimensional interconnection. The superconducting flux qubit, formed across two different chips via bumps, is demonstrated for the first time to show a state transition like that in a conventional qubit. The quantum annealing flux qubit and flip-chip bonding enable new interconnections between qubits. A perspective on the possibility of applying this technology to the connection between gate-type qubits is described.
Flip-chip integration offers a promising route toward scalable superconducting quantum processors and hybrid semiconductor-superconductor quantum devices. We develop a three-dimensional transmon architecture using electroplated indium in which the qubit electric field is shared nearly equally between two bump-bonded substrates while maintaining low participation at the indium-bump interface. The resulting geometry is well suited for future hybrid qubits, enabling the integration of distinct material platforms while minimizing sensitivity to bump-interface loss. Using this platform, we evaluate electroplated indium interconnects for superconducting quantum circuits. Flip-chip transmons incorporating electroplated indium bumps exhibit qubit quality factors around
106. In addition, a systematic study of coplanar-waveguide resonators is used to identify losses associated with the electroplating process. In particular, we find that surface losses associated with the gold-layer, used to enable good electric contact with the indium, is likely the primary contributor to the qubit decay rate. These results demonstrate the compatibility of electroplated indium technology with high-coherence superconducting circuits and establish a promising platform for three-dimensional hybrid quantum integration.