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Long-Term Stability of NIST Chip-Scale Atomic Clock Physics Packages

Svenja A. Knappe, Vishal Shah, Vladislav P. Gerginov, Alan S. Brannon, Leo W. Hollberg, John E. Kitching

Published Dec 9, 2006• 4 citations
OpenAlex

Abstract

We present measurements regarding the long-term frequency stability of NIST chip-scale atomic clock (CSAC) physics packages. Changes of the clock frequency are caused mainly through time-dependent light shifts by the frequency-modulated VCSEL and properties of the vapor cell. We suggest advanced CPT interrogation schemes to relax the requirements on the temperature stability of the VCSEL as well as the power of the local oscillator. Finally, we discuss the advantages and limitations of these techniques when implemented into a small package.

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Applied Physics Letters•Mar 9, 2020•32 citations
We present measurements regarding the long-term frequency stability of NIST chip-scale atomic clock (CSAC) physics packages. Changes of the clock frequency are caused mainly through time-dependent light shifts by the frequency-modulated VCSEL and properties of the vapor cell. We suggest advanced CPT interrogation schemes to relax the requirements on the temperature stability of the VCSEL as well as the power of the local oscillator. Finally, we discuss the advantages and limitations of these techniques when implemented into a small package.
We discuss the long-term stability of the NIST chip-scale atomic clock (CSAC) physics packages. We identify the major factors that currently limit the frequency stability of our CSAC packages after 100 s. The requirements for the stability of the vapor cell and laser temperature, local magnetic field, and local oscillator output power are evaluated. Due to the small size of CSAC physics package assemblies, advances MEMS packaging techniques for vacuum sealing and thermal isolation can be used to achieve the temperature stability goals. We discuss various ideas on how to aid temperature control solutions over wide variations in ambient temperature by implementing atom-based stabilization schemes. Control of environment-related frequency instabilities will be critical for successful insertion of CSACs into portable instruments in the areas of navigation and communication.
We have undertaken the development of a chip-scale atomic clock (CSAC) whose design goals include short-term stability, sigma(sub y)(tau=1 hour), of 1x10(exp 11) with a total power consumption of 30 mW and an overall device volume of 1 cu cm. The stringent power requirement dominates the physics package architecture, dictating a small (<5 mm(exp 3) gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002, we reported on initial experimental investigations leading to the decision to employ the coherent population trapping (CPT) interrogation technique. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser (VCSEL) sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass. Measurements of the signal contrast and linewidth of both the cesium D1 and D2 resonance transitions are compared, and frequency stability measurements of the CSAC testbed are presented.
We have undertaken a development effort to produce a prototype chip-scale atomic clock (CSAC). The design goals include short-term stability, with a total power consumption of less than 30 mW and overall device volume <1 cubic cm. The stringent power requirement dominates the physics package architecture, necessarily dictating a small volume gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002 and PTTI 2003, we reported on laboratory experiments that underlie the fundamental architecture of our CSAC, based on interrogation of the cesium D1 transition by the technique of coherent population trapping (CPT). In the past year, the development effort has shifted from fundamental research and feasibility investigation to engineering and prototype development. In this paper, we report on the design of a rugged and compact physics package that is expected to exceed the ultimate performance and power requirements of the CSAC.
A chip-scale atomic clock implemented with end-state physics has been fabricated and characterized. Batch-fabricated components were specifically designed and developed to enable integration within a small form-factor package. The full physics package, implemented with CW VCSEL optical pump, direct end-state hyperfine RF and Zeeman interrogation for magnetic field stabilization, was demonstrated within a 4 cm3 volume, consuming 25 mW of power, and exhibiting an Allan deviation stability. In addition, end-state signal contrast exceeded 40% from millimeter-scale vapor cells with buffer-gas pressures exceeding 2.5 atmospheres, demonstrating the route to submillimeter vapor-cells within high-performance CSACs for high shock/vibration environments.
The physics package of a chip-scale atomic clock (CSAC) has been successfully realized by integrating vertical cavity surface emitting laser (VCSEL), neutral density (ND) filter, λ/4 wave plate, 87 Rb vapor cell, photodiode (PD), and magnetic coil into a cuboid metal package with a volume of about 2.8 cm 3 . In this physics package, the critical component, 87 Rb vapor cell, is batch-fabricated based on MEMS technology and in-situ chemical reaction method. Pt heater and thermistors are integrated in the physics package. A PTFE pillar is used to support the optical elements in the physics package, in order to reduce the power dissipation. The optical absorption spectrum of 87 Rb D1 line and the microwave frequency correction signal are successfully observed while connecting the package with the servo circuit system. Using the above mentioned packaging solution, a CSAC with short-term frequency stability of about 7 × 10 −10 τ −1/2 has been successfully achieved, which demonstrates that this physics package would become one promising solution for the CSAC.
We propose a model to reduce the influence that the light-shift induced frequency drift has on the long-term stability of coherent population trapping (CPT)-based low-power atomic clocks. We experimentally validated the proposed model using the chip-scale atomic clock architecture. The model considers both the drift of the dc-bias current to compensate for the wavelength aging of the vertical-cavity surface-emitting laser (VCSEL) and the variation in the modulation index of the light field generated by the VCSEL. We investigated the dc-bias-current-dependency of the frequency drift in an atomic clock module both theoretically and experimentally, confirming that the frequency drift can change as a function of the VCSEL basic parameters. When the atomic clock module was operated over a period of five months at the dc-bias current affording a zero-crossing of the clock frequency drift, the Allan standard deviation and clock frequency drift for long-term stability were 8.0×10−12 for averaging times of 4×106 s and 2.4×10−13/day, respectively. Our approach is promising to improve the long-term stability of CPT-based low-power atomic clocks.