We discuss the long-term stability of the NIST chip-scale atomic clock (CSAC) physics packages. We identify the major factors that currently limit the frequency stability of our CSAC packages after 100 s. The requirements for the stability of the vapor cell and laser temperature, local magnetic field, and local oscillator output power are evaluated. Due to the small size of CSAC physics package assemblies, advances MEMS packaging techniques for vacuum sealing and thermal isolation can be used to achieve the temperature stability goals. We discuss various ideas on how to aid temperature control solutions over wide variations in ambient temperature by implementing atom-based stabilization schemes. Control of environment-related frequency instabilities will be critical for successful insertion of CSACs into portable instruments in the areas of navigation and communication.
We discuss the long-term stability of the NIST chip-scale atomic clock (CSAC) physics packages. We identify the major factors that currently limit the frequency stability of our CSAC packages after 100 s. The requirements for the stability of the vapor cell and laser temperature, local magnetic field, and local oscillator output power are evaluated. Due to the small size of CSAC physics package assemblies, advances MEMS packaging techniques for vacuum sealing and thermal isolation can be used to achieve the temperature stability goals. We discuss various ideas on how to aid temperature control solutions over wide variations in ambient temperature by implementing atom-based stabilization schemes. Control of environment-related frequency instabilities will be critical for successful insertion of CSACs into portable instruments in the areas of navigation and communication.
We present measurements regarding the long-term frequency stability of NIST chip-scale atomic clock (CSAC) physics packages. Changes of the clock frequency are caused mainly through time-dependent light shifts by the frequency-modulated VCSEL and properties of the vapor cell. We suggest advanced CPT interrogation schemes to relax the requirements on the temperature stability of the VCSEL as well as the power of the local oscillator. Finally, we discuss the advantages and limitations of these techniques when implemented into a small package.
The physics package of a chip-scale atomic clock (CSAC) has been successfully realized by integrating vertical cavity surface emitting laser (VCSEL), neutral density (ND) filter, λ/4 wave plate, 87 Rb vapor cell, photodiode (PD), and magnetic coil into a cuboid metal package with a volume of about 2.8 cm 3 . In this physics package, the critical component, 87 Rb vapor cell, is batch-fabricated based on MEMS technology and in-situ chemical reaction method. Pt heater and thermistors are integrated in the physics package. A PTFE pillar is used to support the optical elements in the physics package, in order to reduce the power dissipation. The optical absorption spectrum of 87 Rb D1 line and the microwave frequency correction signal are successfully observed while connecting the package with the servo circuit system. Using the above mentioned packaging solution, a CSAC with short-term frequency stability of about 7 × 10 −10 τ −1/2 has been successfully achieved, which demonstrates that this physics package would become one promising solution for the CSAC.
We have undertaken the development of a chip-scale atomic clock (CSAC) whose design goals include short-term stability, sigma(sub y)(tau=1 hour), of 1x10(exp 11) with a total power consumption of 30 mW and an overall device volume of 1 cu cm. The stringent power requirement dominates the physics package architecture, dictating a small (<5 mm(exp 3) gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002, we reported on initial experimental investigations leading to the decision to employ the coherent population trapping (CPT) interrogation technique. This paper describes our further progress on the CSAC effort, including the development of custom vertical cavity surface emitting laser (VCSEL) sources and techniques for microfabricating miniature cesium vapor cells comprised of anodically bonded silicon and glass. Measurements of the signal contrast and linewidth of both the cesium D1 and D2 resonance transitions are compared, and frequency stability measurements of the CSAC testbed are presented.
We have undertaken a development effort to produce a prototype chip-scale atomic clock (CSAC). The design goals include short-term stability, with a total power consumption of less than 30 mW and overall device volume <1 cubic cm. The stringent power requirement dominates the physics package architecture, necessarily dictating a small volume gaseous atomic ensemble interrogated by a low-power semiconductor laser. At PTTI 2002 and PTTI 2003, we reported on laboratory experiments that underlie the fundamental architecture of our CSAC, based on interrogation of the cesium D1 transition by the technique of coherent population trapping (CPT). In the past year, the development effort has shifted from fundamental research and feasibility investigation to engineering and prototype development. In this paper, we report on the design of a rugged and compact physics package that is expected to exceed the ultimate performance and power requirements of the CSAC.
Ever since the idea of the chip-scale atomic clock (CSAC) based on coherent population trapping (CPT) transition theory was proposed, the CSAC has been used widely in many various fields because of its characteristics of low power consumption, small size and good performance. It can be used in micro-positioning navigation and timing system, geophysical prospecting of the ocean bottom, and 5G communication system. Researchers work on reducing its volume and power consumption to make it more widely used. In the meantime, we all made great effort to improve its long-term stability. In this paper, we report our progress toward chip-scale atomic clock based on the87Rb CPT transition during 2019. We reduced the volume of the CSAC from 20 cm3to 12 cm3. For the physical part, we optimized the structure of the physical package to make sure it is possible for mass production. For the electrical part, we redesigned and rearranged the circuit, optimized the temperature control algorithm, employed a disciplining method. Finally, the frequency stability of CSAC was obtained to be 3.66×10-11, 6.39×10-12and 3.42 ×10-13at the interrogation time of 1 s, 103s and 104s respectively.
Atomic clocks play a crucial role in timekeeping, communications, and navigation systems. Recent efforts enabled by heterogeneous MEMS integration have led to the commercial introduction of Chip-Scale Atomic Clocks (CSAC) with a volume of 16 cm3, power consumption of 120 mW, and instability (Allan Deviation) of σ(τ = 1 sec) < 2e-10. In order to reduce the temperature sensitivity of next-generation CSACs for timing applications, the interaction of atoms with the environment must be minimized, which can be accomplished in an architecture based on trapped, laser-cooled atoms. In this paper, we present results describing the development of a miniature cold-atom apparatus for operation as a frequency standard. Our architecture is based on laser-cooling a sample of neutral atoms in a Magneto-Optical Trap (MOT) using a conical retro-reflector in a miniature vacuum chamber. Trapping the atoms in vacuum and performing microwave interrogation in the dark reduces the temperature sensitivity compared to vapor-cell CSACs. We present details of the component development associated with the laser systems, opto-electronics, and vacuum package for miniature cold-atom technology. Finally, we conclude by characterizing the optimum alkali background pressure for such a cold-atom frequency standard.