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IEICE Technical Report; IEICE Tech. Rep.

High-Speed Test of Circuit Components of SFQ Radix-2 Butterfly Processor using 10 kA/cm 2 Nb Advanced Process

Fumishige Miyaoka, Yasuhiro Shimamura, Toshiki Kainuma, Yuki Yamanashi, Nobuyuki Yoshikawa

Published Oct 12, 2010• 0 citations
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We are developing a high-speed FFT processor using single- flux-quantum (SFQ) logic circuits. In our previous studies we have designed and demonstrated a 4-bit butterfly processor using the AIST 10 kA/cm2Nb Advanced Process 2 (ADP2) at the frequency of 51.6 GHz, which is the main circuit of the FFT processor. In this study, we investigated the architecture of the SFQ FFT processor. We also designed the component circuits for on-chip SFQ FFT system using ADP2. We demonstrated the component circuits, the data-shuffling circuit and twiddle factor ROM for 4-bit 8-point FFT at the maximum frequency of 59.5 GHz and 51.5 GHz, respectively. The calculation time for a 32-bit 1024-point FFT using a pipelined SFQ FFT processor was estimated to be 6.2 μs.

IEEE International Superconductive Electronics Conference (ISEC)•Jul 1, 2015•3 citations
We are developing a high-speed FFT processor using single- flux-quantum (SFQ) logic circuits. In our previous studies we have designed and demonstrated a 4-bit butterfly processor using the AIST 10 kA/cm2Nb Advanced Process 2 (ADP2) at the frequency of 51.6 GHz, which is the main circuit of the FFT processor. In this study, we investigated the architecture of the SFQ FFT processor. We also designed the component circuits for on-chip SFQ FFT system using ADP2. We demonstrated the component circuits, the data-shuffling circuit and twiddle factor ROM for 4-bit 8-point FFT at the maximum frequency of 59.5 GHz and 51.5 GHz, respectively. The calculation time for a 32-bit 1024-point FFT using a pipelined SFQ FFT processor was estimated to be 6.2 μs.