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IEICE technical report. Speech

High-Speed Test of a Radix-2 Butterfly Processing Element for the Fast Fourier Transform using SFQ Circuits

Fumishige Miyaoka, Toshiki Kainuma, Yasuhiro Shimamura, Yuki Yamanashi, Nobuyuki Yoshikawa

Published Jul 15, 2010• 2 citations
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The Fast Fourier Transform (FFT) is extensively used in image processing, wireless communication, and other applications. Some applications that involve very complicated, real-time FFT processing require specialized hardware for performing high-speed FFT processing. We have been developing high-speed FFT processors based on single flux quantum (SFQ) circuit technology. In this study, we developed a butterfly processing element for FFT processors that uses SFQ circuits. The butterfly processing element consists of complex number adders, subtractors, and multipliers. The circuit structure was modified compared to that of previous SFQ FFT processors to reduce latency. Several buffer circuits were inserted in the multipliers to compensate for timing jitter accumulation and discrepancies due to signal propagation delay. We designed and implemented a four-bit bit-serial butterfly processing element that contains 5763 Josephson junctions using the ISTEC Nb 2.5-kA/cm2standard 2 process and the CONNECT cell library. Correct operation of the butterfly processing unit was experimentally confirmed at a clock frequency of 25 GHz.

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We are developing a fast Fourier transform (FFT) processor using high-speed and low-power single-flux-quantum (SFQ) circuits. Our main concern is the development of an SFQ butterfly processing circuit, which is the core processing circuit in the FFT processor. In our previous study, we have confirmed the complete operation of an integer-type butterfly processing circuit using the AIST 2.5 kA/cm2 Nb standard process at the frequency of 25 GHz. In this study, we have designed an integer-type butterfly processing circuit using the AIST 10 kA/cm2 Nb advanced process and confirmed its high-speed operation at the maximum frequency of 50 GHz.

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The Fast Fourier Transform (FFT) is extensively used in image processing, wireless communication, and other applications. Some applications that involve very complicated, real-time FFT processing require specialized hardware for performing high-speed FFT processing. We have been developing high-speed FFT processors based on single flux quantum (SFQ) circuit technology. In this study, we developed a butterfly processing element for FFT processors that uses SFQ circuits. The butterfly processing element consists of complex number adders, subtractors, and multipliers. The circuit structure was modified compared to that of previous SFQ FFT processors to reduce latency. Several buffer circuits were inserted in the multipliers to compensate for timing jitter accumulation and discrepancies due to signal propagation delay. We designed and implemented a four-bit bit-serial butterfly processing element that contains 5763 Josephson junctions using the ISTEC Nb 2.5-kA/cm2standard 2 process and the CONNECT cell library. Correct operation of the butterfly processing unit was experimentally confirmed at a clock frequency of 25 GHz.
We are developing a fast Fourier transform (FFT) processor using high-speed and low-power single-flux-quantum (SFQ) circuits. Our main concern is the development of an SFQ butterfly processing circuit, which is the core processing circuit in the FFT processor. In our previous study, we have confirmed the complete operation of an integer-type butterfly processing circuit using the AIST 2.5 kA/cm2 Nb standard process at the frequency of 25 GHz. In this study, we have designed an integer-type butterfly processing circuit using the AIST 10 kA/cm2 Nb advanced process and confirmed its high-speed operation at the maximum frequency of 50 GHz.