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IEICE Technical Report; IEICE Tech. Rep.

Demonstration of an 8-point 7-bit SFQ-based FFT processor

Ke Fei, Yuki Yamanashi, Nobuyuki Yoshikawa

Published Aug 2, 2019• 0 citations
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We are developing a high-speed FFT processor using single- flux-quantum (SFQ) logic circuits. In our previous studies we have designed and demonstrated a 4-bit butterfly processor using the AIST 10 kA/cm2Nb Advanced Process 2 (ADP2) at the frequency of 51.6 GHz, which is the main circuit of the FFT processor. In this study, we investigated the architecture of the SFQ FFT processor. We also designed the component circuits for on-chip SFQ FFT system using ADP2. We demonstrated the component circuits, the data-shuffling circuit and twiddle factor ROM for 4-bit 8-point FFT at the maximum frequency of 59.5 GHz and 51.5 GHz, respectively. The calculation time for a 32-bit 1024-point FFT using a pipelined SFQ FFT processor was estimated to be 6.2 μs.
A fast Fourier transform (FFT) is an algorithm that computes the discrete Fourier transform (DFT) of a sequence at high speed. FFT can convert a signal from time domain to frequency domain, and is wildly used in digital signal processing field. In this paper, a high-speed, low-power FFT processor is demonstrated up to 47.8GHz with the measured power consumption of 5.3mW, using single-flux quantum (SFQ) logic. This is the first complete FFT processor implementation using superconducting technology, performing 8-point 7-bit FFT in a bit-serial computing manner. The test chip fabricated using a 1.0 μm 9-layer process consists of 17 455 Nb/AlOx/Nb Josephson junctions (JJs), rendering itself the largest superconducting digital circuit capable of iterative data computing. The correct operation of the chip has been experimentally confirmed at a maximum operating frequency of 47.8GHz (word speed 8GHz) by conducting on-chip high-speed testing.