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IEEE Transactions on Applied Superconductivity

Fabrication of Voltage Standard Circuits Utilizing a Serial–Parallel Power Divider

Hirotake Yamamori, Satoshi Kohjiro

Published Oct 27, 2016• 8 citations
Publisher

Abstract

Digital-to-analog converter circuits utilizing NbTiN/Ti-TiN/NbTiN Josephson junctions were fabricated as quantum voltage standards, and were evaluated at around 10 K in a cryocooler. The first Shapiro step was generated at 2 V and had a height of more than 0.5 mA. Instead of a conventional microwave power divider that uses a quarter-wavelength resonator, a serial-parallel power divider was employed. This consisted of coplanar waveguides connected in parallel and coplanar strips connected in series. As a result, the chip area for the power divider was reduced by about 70%, and uniform frequency characteristics for the operating current margin were obtained.

DOI
10.1109/tasc.2016.2622619

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Digital-to-analog converter circuits utilizing NbTiN/Ti-TiN/NbTiN Josephson junctions were fabricated as quantum voltage standards, and were evaluated at around 10 K in a cryocooler. The first Shapiro step was generated at 2 V and had a height of more than 0.5 mA. Instead of a conventional microwave power divider that uses a quarter-wavelength resonator, a serial-parallel power divider was employed. This consisted of coplanar waveguides connected in parallel and coplanar strips connected in series. As a result, the chip area for the power divider was reduced by about 70%, and uniform frequency characteristics for the operating current margin were obtained.
New microwave circuits for voltage standard application containing 256 shunted bicrystal junctions were designed and investigated. The series array follows a meander line, which prevents the uniform distribution of microwave current along the array. To overcome this drawback, we are placing the meander parallel to a coplanar waveguide line. This provides parallel feeding of microwave power to series connected junctions. A circuit divided in 8 sub-arrays represents a seven-bit digital-to-analog converter. At a frequency f=27332 MHz and for a constant power each of the segments of the array demonstrated the first current step at 78 K.
We present a microwave circuit for Josephson voltage standards. Here, the Josephson junctions are integrated in a microwave transmission line designed as coplanar strips (CPS). The new layout offers the possibility of achieving a higher scale of integration and to considerably simplify the fabrication technology. The characteristic impedance of the CPS is about 50 Ω, and this should be of interest for programmable Josephson voltage standard circuits with SNS or SINIS junctions. To demonstrate the function of the microwave circuit design, conventional 10 V Josephson voltage standard circuits with 17 000 Nb/AlOx/Nb junctions were prepared and tested. Stable Shapiro steps at the 10 V level were generated. Furthermore, arrays of 1400 SINIS junctions in this microwave layout exhibited first-order Shapiro steps.
A 10-V programmable Josephson voltage standard (PJVS) circuit including 524 288 vertically stacked NbN/TiN/NbN Josephson junctions was successfully fabricated without any defects. The chip was cooled with a compact cryocooler at a temperature of 9.8 K and generated an output voltage of 17.3 V with the first Shapiro step height of 1.0 mA under microwave irradiation at 16 GHz. Furthermore, the circuit design having the high output voltage increased the number of available chips for the 10-V PJVS. The fabrication yield for the chip, which generates greater than 10 V, was 36%, which is ten times greater than that for a perfect chip without any defects. This method was not effective for the chip that had serious defects, such as a disconnection across the array or short between the array and ground; thus, efforts to reduce such defects, e.g., frequent maintenance inside vacuum chambers for film preparation and etching, were found to be essential.
Series arrays of Nb–PdAu–Nb Josephson junctions were fabricated with characteristics ideally suited for application in programmable voltage standards and D/A converters with fundamental accuracy. Large arrays of junctions with applied microwave power showed constant voltage steps with current amplitudes as large as 7 mA. A novel coplanar waveguide design enabled uniform microwave power coupling to a five-segment array of 8192 junctions, so each segment had constant voltage steps over the same bias range. The 8192-junction device generated 1.1 mA steps at 186 mV with 11 GHz power and a maximum constant voltage step of 260 mV at 15.34 GHz.
Binary-divided 1 V arrays were fabricated for programmable Josephson voltage standards in close cooperation between INRIM and PTB. The arrays, consisting of 8192 overdamped Nb/Al-AlO(x)Nb SNIS Josephson junctions, were successfully operated at microwave frequencies around 70 GHz. While the characteristic voltage of the junctions ranged from 0.25 to 0.6 mV, the current margins were larger than 1 mA for the Shapiro step n = 1. In addition, flat Shapiro steps of higher order (n = 3 and 4) were generated at increased microwave power levels due to the large characteristic voltage, demonstrating the small parameter spread of the SNIS junctions. Operation at temperatures up to 6-7 K has also been verified, measuring quantized voltages up to 1.25 V on the n = 1 step.
Using NbN∕TiNx∕NbN∕TiNx∕NbN double-junction stack technology we have demonstrated a programmable Josephson voltage standard chip that operates up to 10.16V output voltage cooled with a two-stage Gifford–McMahon cryocooler. The circuit uses double-junction stacks, where two junctions are fabricated in each stack, in order to integrate 327 680 junctions into a 15.3mm×15.3mm chip. A 1-to-32 microwave distribution circuit is also integrated on the chip. The chip is divided into 22 cells, which perform as an 11-bit digital-to-analog converter. The 21 working cells include 307 200 junctions biased with 16GHz microwaves at 10.2K that generated flat voltage steps with current margins greater than 1mA, which indicates good uniformity of the stacked junctions.