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Applied Physics Letters

10 V programmable Josephson voltage standard circuits using NbN∕TiNx∕NbN∕TiNx∕NbN double-junction stacks

Hirotake Yamamori, Mayumi Ishizaki, Alexandre Shoji, Paul D. Dresselhaus, Samuel P. Benz

Published Jan 23, 2006• 91 citations
Publisher

Abstract

Using NbN∕TiNx∕NbN∕TiNx∕NbN double-junction stack technology we have demonstrated a programmable Josephson voltage standard chip that operates up to 10.16V output voltage cooled with a two-stage Gifford–McMahon cryocooler. The circuit uses double-junction stacks, where two junctions are fabricated in each stack, in order to integrate 327 680 junctions into a 15.3mm×15.3mm chip. A 1-to-32 microwave distribution circuit is also integrated on the chip. The chip is divided into 22 cells, which perform as an 11-bit digital-to-analog converter. The 21 working cells include 307 200 junctions biased with 16GHz microwaves at 10.2K that generated flat voltage steps with current margins greater than 1mA, which indicates good uniformity of the stacked junctions.

DOI
10.1063/1.2167789

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IEEE Transactions on Applied Superconductivity•Jun 1, 2003•37 citations
Using NbN∕TiNx∕NbN∕TiNx∕NbN double-junction stack technology we have demonstrated a programmable Josephson voltage standard chip that operates up to 10.16V output voltage cooled with a two-stage Gifford–McMahon cryocooler. The circuit uses double-junction stacks, where two junctions are fabricated in each stack, in order to integrate 327 680 junctions into a 15.3mm×15.3mm chip. A 1-to-32 microwave distribution circuit is also integrated on the chip. The chip is divided into 22 cells, which perform as an 11-bit digital-to-analog converter. The 21 working cells include 307 200 junctions biased with 16GHz microwaves at 10.2K that generated flat voltage steps with current margins greater than 1mA, which indicates good uniformity of the stacked junctions.
Programmable Josephson voltage standard (PJVS) circuits using arrays of NbN/TiN/NbN/TiN/NbN double-junction stacks were fabricated and operated at a temperature of 10 K. Four arrays each with 32 768 junctions produced expected voltage outputs when driven at (10, 15, 17, and 20) GHz with an operating current range of 0.2-1.0 mA. Another circuit showed constant-voltage steps at /spl plusmn/6 V when driven with an 11 GHz microwave bias, indicating that over 260 000 junctions were operating properly. This circuit did not show constant-voltage steps when driven with a 19 GHz microwave bias, which was the design frequency to achieve /spl plusmn/10 V output voltage.
A 10-V programmable Josephson voltage standard (PJVS) circuit including 524 288 vertically stacked NbN/TiN/NbN Josephson junctions was successfully fabricated without any defects. The chip was cooled with a compact cryocooler at a temperature of 9.8 K and generated an output voltage of 17.3 V with the first Shapiro step height of 1.0 mA under microwave irradiation at 16 GHz. Furthermore, the circuit design having the high output voltage increased the number of available chips for the 10-V PJVS. The fabrication yield for the chip, which generates greater than 10 V, was 36%, which is ten times greater than that for a perfect chip without any defects. This method was not effective for the chip that had serious defects, such as a disconnection across the array or short between the array and ground; thus, efforts to reduce such defects, e.g., frequent maintenance inside vacuum chambers for film preparation and etching, were found to be essential.
We have demonstrated a programmable Josephson voltage standard (PJVS) operation up to 10.84 V using a multi-chip technique. We combined two PJVS chips fabricated using NbN/(TiN x /NbN) 2 junction technology. Each PJVS chip was mounted on a single chip carrier using bonding wire, and the two chip carriers were connected by a simple Cu lead wire, and mounted on a cryocooler. High-precision measurements confirmed flat voltage steps for all 22 cells, with a peak-to-peak variation of 100 nV and wide margins of at least 0.35 mA. We also confirmed the stability of the voltage steps in spite of a temperature and RF frequency variation of ± 0.1 K and ± 0.1 GHz, respectively.
Operating Margins of a 10 V Programmable Josephson Voltage Standard Circuit Using NbN/TiNx/NbN/TiNx/NbN{\rm NbN}/{\rm TiN}_{x}/{\rm NbN}/{\rm TiN}_{x}/{\rm NbN}NbN/TiNx​/NbN/TiNx​/NbN Double-Junction Stacks
The operating margins of a 10 V programmable Josephson voltage standard circuit using Operating margins of a 10 V programmable josephson voltage standard circuit using NbN/TiNx/NbN/TiNx/NbN double-junction stacks was investigated as a function of microwave frequency and operating temperature. The circuit contained 32 arrays of 5 120 Operating margins of a 10 V programmable josephson voltage standard circuit using NbN/TiNx/NbN/TiNx/NbN double-junction stacks. In other words, the circuit contained 327 680 Operating margins of a 10 V programmable Josephson voltage standard circuit using NbN/TiNx/NbN/TiNx/NbN junctions. It was found that the operating margins (the heights of the constant-voltage step) of the arrays varied largely with microwave frequency and operating temperature. The microwave-frequency dependence was due to the resonance of the microwaves in the circuit. The temperature dependence of the circuit was due to the temperature dependence of the IcRnproduct of the junctions, where Icwas the critical current Rnand was the normal resistance. Fortunately, however, the operating margin was maximized by changing the temperature of the chip, mounted on the cold head of a cryocooler.
A refrigeration system was designed and constructed for realizing a liquid-He-free programmable Josephson voltage standard. The system is equipped with a two-stage Gifford-McMahon cooler, a thermal-radiation shield, a magnetic-field shield and semi-rigid coaxial cables to supply microwave power to a chip. The performance of the system was examined by use of a NbN-based 8-bit digital-to-analog converter (DAC) chip designed as a 1 V programmable voltage standard. When operated at 8.5 K on the cryocooler, constant-voltage steps with amplitudes greater than 1 mA were observed for every segment of junction arrays on the chip.