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IEEE Transactions on Applied Superconductivity

Power Reduction of Josephson Random Access Memory Using Stochastic Resonance

Ryosuke Kihara, Yuki Yamanashi, Nobuyuki Yoshikawa

Published Sep 8, 2016• 4 citations
Publisher

Abstract

A superconducting quantum interference device (SQUID) is used as a memory cell in a superconducting Josephson random access memory (RAM) system. In the Josephson RAM, power is mainly consumed by driver circuits, which drive word and bit lines to select the target memory cell. We investigated the power reduction of READ/WRITE operation of the SQUID memory cell by using a stochastic resonance phenomenon. By using a noise-assisted state transition of the SQUID, the driving current required for the READ/WRITE operation of the memory cell can be reduced. We investigated optimum bias and noise conditions where stochastic resonance efficiently occurs on the basis of analog circuit simulation that takes influences of thermal noises into account. According to the simulation results, the power dissipation required for READ/WRITE operation can be reduced by approximately 20% under the optimum bias and noise conditions when the error rate of READ/WRITE operation is 10-10. We designed a 1-bit rf-SQUID memory cell using the AIST 2.5 kA/cm2Nb standard process 2, and tested the cell by applying a white noise from the room-temperature instrument. The probability that a datum is written to the memory cell and read out correctly was measured under various bias and noise conditions. We have experimentally observed stochastic resonance and obtained the error rate of 10-5 when the power dissipation of READ/WRITE operation is reduced to 80% compared to the conventional Josephson RAM.

DOI
10.1109/tasc.2016.2607156

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A superconducting quantum interference device (SQUID) is used as a memory cell in a superconducting Josephson random access memory (RAM) system. In the Josephson RAM, power is mainly consumed by driver circuits, which drive word and bit lines to select the target memory cell. We investigated the power reduction of READ/WRITE operation of the SQUID memory cell by using a stochastic resonance phenomenon. By using a noise-assisted state transition of the SQUID, the driving current required for the READ/WRITE operation of the memory cell can be reduced. We investigated optimum bias and noise conditions where stochastic resonance efficiently occurs on the basis of analog circuit simulation that takes influences of thermal noises into account. According to the simulation results, the power dissipation required for READ/WRITE operation can be reduced by approximately 20% under the optimum bias and noise conditions when the error rate of READ/WRITE operation is 10-10. We designed a 1-bit rf-SQUID memory cell using the AIST 2.5 kA/cm2Nb standard process 2, and tested the cell by applying a white noise from the room-temperature instrument. The probability that a datum is written to the memory cell and read out correctly was measured under various bias and noise conditions. We have experimentally observed stochastic resonance and obtained the error rate of 10-5 when the power dissipation of READ/WRITE operation is reduced to 80% compared to the conventional Josephson RAM.
Superconductor electronics offers logic circuits for high-speed data processing and high-performance computing. The main barrier to practical application is the lack of high-speed and low-power memory. It is widely believed that the most reliable and functional bit cell for superconducting memory is the vortex transitional bit cell, which was successfully used by Nagasawa in a 4-kb memory. This paper reviews existing challenges in this type of Josephson memory devices and discusses engineering issues in implementing a model single flux quantum random access memory. We evaluate the contributions that various components of the memory system make to delay and power dissipation. The 256-bit memory provides an experimentally confirmed read access time of 190 ps. As a result, we found that delay and power dissipation are found largely in the address decoder, line drivers, bit-selection scheme, and the data readout circuitry. With these circuits being similar for various magnetic memory devices, our findings provide essential data for a comprehensive assessment of new concepts for bit cells, readout, and write in superconducting memories.
The design and experimental results for a novel type of Josephson memory cell are presented. The cell has a simpler construction than the conventional Henkels-type, using a one-junction SQUID (superconducting quantum interference device) capacitively coupled to a single junction. Binary data are stored as single flux quanta and are destructively read out by sensing a pulse caused by a vortex-mode transition. Computer simulations suggest that the read operation could be performed with a bias margin for the sense junction of +or-28% and that the rise time of the sense current in a 16-bit memory cell would be as fast as 30 ps, despite having to sense a vortex-mode transition. Results are presented for a memory cell fabricated with Nb-AlO/sub x/-Nb junctions.>
The address decoders, address line drivers, and sense circuits of the fully decoded memory consist of resistor-coupled Josephson logic circuits to realize fast access. The memory cell is constructed from two three-junction symmetric SQUID (superconducting quantum interface device) gates, and a four-flux-quanta storage loop for enabling bipolar current drive. This memory configuration has intrinsic advantages in regard to magnetic flux trapping in address lines and a gate circuit latch-up problem over a DC-powered memory constructed from inductor coupled gates. Individual control and cell circuits were fabricated, using a lead-alloy process, and their operation was verified. A 570-ps read access time is estimated as the sum measured 280-ps decoding time, and calculated 130-ps address line current rising time, 110-ps sense time, and 50-ps signal propagation time. The 1-kb chip is designed to consume 9 mW without voltage regulators.>
A new design concept for the Josephson-junction random access memory (RAM) has been developed. In contrast to previous RAMs based on single flux quantization (SFQ), in our system READ and WRITE operations employ ballistic transfer of SFQ pulses along bit lines (either Josephson transmission lines, or passive superconducting microstrip lines, or their combination). The basic memory cells are the single-junction SQUIDs, connected serially by the bit lines and inductively coupled to word lines. READ and WRITE operations are performed by sending SFQ pulses in appropriate directions along bit lines, and DC currents of appropriate polarity into word lines. This approach allows design of very dense memories with n/spl les/2 Josephson junctions per bit, memory cell area smaller than 80 /spl lambda//sup 2/ (where /spl lambda/ is the minimum feature size), and the critical parameter margin well above /spl plusmn/20%. In this paper we present the general structure of the RSFQ RAM, as well as design and results of testing of the basic memory cell and decoder circuitry using Hypres' 3.5-/spl mu/m, 1-kA/cm/sup 2/ Nb-trilayer technology.>
The impedance and noise of a resistive superconductive quantum interference device (R-SQUID) have been measured as a function of the dc and rf currents applied to it. The Josephson junction was adjustable so that data were also taken for several values of the junction critical current. The results were compared with the predictions of a resistively shunted junction (RSJ) model which takes into account the influence of the Josephson junction on the impedance and noise. The agreement was found to be quite good and demonstrates that the noise in the circuit is well understood. Use of the R-SQUID as a noise thermometer below 1 K is assessed in terms of corrections due to the RSJ model. It is demonstrated how the dc and rf currents may be adjusted so that the total noise of the R-SQUID is reduced to within 0.1% of the Johnson noise generated by the resistor alone. Under these conditions, the R-SQUID may be used as a noise thermometer to determine thermodynamic temperature to this inaccuracy from 6 to 700 mK.
We propose a new cryogenic high-speed and low-power matrix memory required for achieving a high-performance superconductor computing system. The memory cell is based on the 0-π SQUID with conventional Josephson junctions (0-junctions) and a π-shifted ferromagnetic Josephson junction (π-junction). The memory state is stored in the form of two stable states in the 0-π SQUID. The π shift feature of the π-junction eliminates the need for any bias current or magnetic field for the formation of two states, i.e., the memory is non-volatile. In this memory, an impulse-shaped voltage signal generated in single-flux-quantum (SFQ) circuits is used for the write and read operations of the memory state. By using the pulses propagating in passive transmission lines, high-speed and low-power operation can be achieved because a recharging process determining the operation speed and the dominant energy consumption can be eliminated. We fabricated the 0-π SQUID-based pulse-driven memory cells with an SFQ driver. From the static characteristics, we confirmed that the current needed for rewriting can be sufficiently reduced. In addition, we successfully demonstrated the correct write operation in the memory cell by the SFQ pulse train transmitted from the SFQ driver via the passive transmission line.