Error-free computation is an unattainable ideal, yet our world now contains many computers that appear error-free to their users. That such things are possible is explained by sophisticated theorems that demonstrate the possibility of efficiently reducing computational errors introduced by reasonably well-behaved noise. My thesis is about the problem of determining whether noise in prototype quantum information processors is sufficiently well-behaved for fault-tolerant quantum computing to be possible. My work is divided into two themes. The first theme is the interpretation of average gate fidelity, a quantity that has become the standard performance metric for assessing progress towards fault tolerance. I have elucidated the connection between average gate fidelity and the requirements of fault-tolerant quantum computing by demonstrating the limits of fidelity as a proxy for error rate, the usual metric in fault-tolerance literature. I thereby conclude that information additional to fidelity is required to assess progress towards fault-tolerance. The second theme is the characterization of two-level defect systems, a particularly deleterious kind of noise that can affect superconducting-integrated-circuit-based quantum computing prototypes. I have designed statistical experimental design algorithms that can rigorously assess the influence of these defect systems, and I helped develop a proposal to mitigate their influence. I thereby demonstrate that existing experimental techniques can become much more powerful by employing advanced data collection procedures. My work has immediate implications for current research efforts towards the first working quantum computer. Theoretical work should be directed at assessing noise sources using metrics other than average gate fidelity, and future experimental characterization techniques should become more modular in order to incorporate advanced statistical inference techniques like the ones I develop herein.
Error-free computation is an unattainable ideal, yet our world now contains many computers that appear error-free to their users. That such things are possible is explained by sophisticated theorems that demonstrate the possibility of efficiently reducing computational errors introduced by reasonably well-behaved noise. My thesis is about the problem of determining whether noise in prototype quantum information processors is sufficiently well-behaved for fault-tolerant quantum computing to be possible. My work is divided into two themes. The first theme is the interpretation of average gate fidelity, a quantity that has become the standard performance metric for assessing progress towards fault tolerance. I have elucidated the connection between average gate fidelity and the requirements of fault-tolerant quantum computing by demonstrating the limits of fidelity as a proxy for error rate, the usual metric in fault-tolerance literature. I thereby conclude that information additional to fidelity is required to assess progress towards fault-tolerance. The second theme is the characterization of two-level defect systems, a particularly deleterious kind of noise that can affect superconducting-integrated-circuit-based quantum computing prototypes. I have designed statistical experimental design algorithms that can rigorously assess the influence of these defect systems, and I helped develop a proposal to mitigate their influence. I thereby demonstrate that existing experimental techniques can become much more powerful by employing advanced data collection procedures. My work has immediate implications for current research efforts towards the first working quantum computer. Theoretical work should be directed at assessing noise sources using metrics other than average gate fidelity, and future experimental characterization techniques should become more modular in order to incorporate advanced statistical inference techniques like the ones I develop herein.
This thesis is concerned with certain theoretical problems that arise naturally in the context of fault-tolerant quantum computation. Fault-tolerance can be defined as the art of building reliable devices from unreliable components, and is of particular importance for quantum computers that aim to precisely control the dynamics of extremely sensitive quantum systems. A model of quantum computation is a specification of the basic building blocks by which a quantum computation is implemented. The best known model is the quantum circuit model, where computations are implemented by means of unitary quantum gates that are applied to two-level quantum systems known as qubits. In a physical implementation of a quantum circuit, the gates and qubits will inevitably be affected by noise. Fault-tolerant quantum circuits are designed to be resilient against the effects of this noise, provided that it is not too strong. Fault-tolerance in the quantum circuit model is well developed thanks to the theory of quantum error-correcting codes. These codes allow for the correction of small numbers of errors introduced by a variety of noise processes. In a fault-tolerant quantum circuit, qubits are replaced with encoded qubits, and quantum gates with encoded gates that are immediately followed by special quantum circuits for error correction. Provided the rate at which errors occur is below a constant threshold value, the accumulation of errors can be checked so that the correct output of the computation correctly determined. The threshold acts as both a measure of how good the design of a quantum circuit is, and also as a target for experimenters aiming to implement quantum circuits. Much current research in quantum computation is aimed at designing quantum circuits that increase the noise threshold, hopefully to the point where it becomes within the reach of experimenters. A fault-tolerant encoded quantum gate must limit the propagation of errors so that the code’s corrective capabilities are not overwhelmed. It is not so easy to design encoded gates that satisfy this property, and to date only a finite handful of such gates are known. In a faulttolerant quantum circuit, all quantum gates must be decomposed or compiled in terms of those that may be implemented fault-tolerantly. In the first part of this thesis, we present two results that may be applied to this problem of gate compilation. The first is a generic method based on the Solovay-Kitaev theorem that may be applied to all quantum gates, but is most effective for those that act on single qubits. We present the Solovay-Kitaev theorem in its simples known form as an algorithm, together with novel constructions that can be used to implement it. Following this we give a two specialized methods for two-qubit gate decomposition, based on the Cartan decomposition of the Lie group SU(4). The cluster-state model of computation is an alternative to the quantum circuit model, and makes use of quantum measurements and highly entangled cluster-states to implement a quantum computation. The fault-tolerant techniques developed for quantum circuits are not immediately applicable in this model, so in order for it to be a realistic candidate for performing computations we prove that such techniques are possible. In the second part of the thesis we prove that constant fault-tolerance thresholds may be achieved in the cluster-state model, and in particular in an adaption to an optical implementation. Following this we design a complete error correction scheme for optical cluster-state computation, and numerically determine the threshold of this model in the face of the dominant noise models likely to affect such an implementation.
This thesis presents multiple advances in the construction of noise-resistant quantum computers. In order to bridge the gap between abstract theory and practical experiments, my research encompasses a wide range of subfields within quantum computing, including error correction, silicon spin qubit physics and error mitigation. Firstly, I demonstrate that large-scale defects affecting entire regions of an error correcting code, such as cosmic rays or manufacturing defects, do not necessarily constitute a fundamental obstacle. Conversely, bespoke protocols that employ code deformation can be utilised to mitigate their impact, at a moderate resource overhead. Secondly, I investigate the feasibility of building a fault-tolerant silicon spin qubit quantum computer in the near term. I demonstrate that arranging the qubits in a 2×N array represents an effective methodology for the construction of error correcting codes, provided that the qubits can be shuttled with high fidelity. This expected characteristic of silicon spins can thus be utilised to circumvent the construction of complex dense 2D grids of qubits. Subsequently, I build upon the existing literature on the implementation of low-noise gates in silicon spin qubits, at the physical level this time. Specifically, I design a protocol for the individual control of silicon spin qubits, without the need for local magnetic fields targeting every qubit in the device. This simplification enables efficient control of silicon spins, whose single-qubit addressability was an identified bottleneck. Finally, I complement the above research with an error mitigation scheme targeted at the evaluation of eigenvalues with an early-fault-tolerant quantum computers. This scheme promises to alleviate the stringent resource costs of error correction, thereby paving the way for fault-tolerance in a nearer future.
Remarkable experimental advances in quantum computing are exemplified by recent announcements of impressive average gate fidelities exceeding 99.9% for single-qubit gates and 99% for two-qubit gates. Although these high numbers engender optimism that fault-tolerant quantum computing is within reach, the connection of average gate fidelity with fault-tolerance requirements is not direct. Here we use reported average gate fidelity to determine an upper bound on the quantum-gate error rate, which is the appropriate metric for assessing progress towards fault-tolerant quantum computation, and we demonstrate that this bound is asymptotically tight for general noise. Although this bound is unlikely to be saturated by experimental noise, we demonstrate using explicit examples that the bound indicates a realistic deviation between the true error rate and the reported average fidelity. We introduce the Pauli distance as a measure of this deviation, and we show that knowledge of the Pauli distance enables tighter estimates of the error rate of quantum gates.
Quantum computing holds the potential to address problems that are currently considered intractable for classical processors by leveraging quantum mechanical effects for simulation, optimization, and chemistry. Despite recent technological progress, quantum hardware remains in the noisy intermediate-scale regime, where coherence limits, gate imperfections, and readout errors restrict circuit depth and algorithmic reliability. Although first demonstrations of small-scale Quantum Error Correction exist, logical processors with low logical error rates are still distant. In the near term, even error-corrected qubits are expected to operate with residual error, which means that improving calibration and mitigating errors at the physical and circuit level will remain essential for obtaining meaningful results. Established calibration routines and mitigation methods such as Zero-Noise-Extrapolation (ZNE) are valuable, but need to be further improved and more rigorously validated with respect to their underlying assumptions, stability and quantitative benefits. This thesis addresses error reduction techniques on transmon qubits through calibration, gate analysis, and circuit-level mitigation. First, a systematic comparison of two single-qubit amplitude calibration techniques is carried out (cross-point and ping-pong calibration), followed by an analysis of two implementations of a two-qubit gate, based on the cross-resonance interaction. The results show that cross-point calibration offers faster convergence, higher precision and a more favorable signal to noise ratio than ping-pong calibration. Hamiltonian tomography confirms the validity of a reduced model for the cross-resonance interaction, and algorithmic tests reveal that direct and echoed CNOT gates offer complementary advantages depending on the application. Second, the thesis develops and evaluates the method of Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE). Its main idea consists of measuring the effective error strength of a circuit through inverted circuits. This quantity is then used for extrapolation towards zero noise rather than relying on simple, approximate noise scaling assumptions as in standard ZNE. This approach constitutes a novel and original method. IC-ZNE consistently produces results closer to ideal reference values than standard ZNE. The method achieves up to 77% error reduction in observable error on the tested circuits compared to standard ZNE and simple post processing filters can yield up to 39% reduction in selected cases compared to standard ZNE. Further refinements introduce noise-adaptive circuit scaling strategies that enhance mitigation outcomes without significant additional cost. The performance of these techniques is examined across several circuits and in the context of variational quantum algorithms. Applications to the Quantum Approximate Optimization Algorithm and the Variational Quantum Eigensolver demonstrate that these techniques extend the useful operating regime of current devices, although their effectiveness decreases for very deep circuits or unfavorable variational ansätze. Taken together, the calibration and mitigation techniques investigated and developed in this thesis demonstrate practical routes toward enhancing the reliability of near-term quantum processors. While they cannot replace full fault-tolerant quantum computation, they offer useful and complementary capabilities that support progress toward scalable quantum technologies.
Gate fidelity -- an average fidelity over all possible input states -- is the workhorse metric for benchmarking quantum gates or circuits, yet fault-tolerant quantum computing ultimately depends on the worst-case behavior, typically quantifiable by so-called the diamond distance. In the low-error regime, the coherent errors can inflate the worst-case error even when the reported gate fidelity is high, making the gate fidelity alone an unreliable proxy for fault-tolerance readiness. To capture the missing information, we introduce a companion observable -- what we dub the fidelity deviation -- that quantifies how strongly the state-dependent fidelities fluctuate across input states. Adopting such fluctuations in assessing the fault-tolerance is physically natural because some input directions are nearly unaffected while others form narrow "valleys" that dominate adversarial circuit behavior. For coherent (unitary) gate errors on two or more qubits, we show that the gate fidelity together with the fidelity deviation constrains the relevant spectral moments of the error unitary, enabling an explicit and tight certificate of the worst-case error. Both quantities are estimated directly from the same randomized input-measurement experiment, without full process tomography. We show that the fidelity and its deviation can provide an economical, operationally meaningful, and accurate standard for assessing the fault tolerance of the engineered quantum gates and circuits.
Quantum computing promises to address problems in simulation, optimization, and chemistry, but current hardware operates in the noisy intermediate-scale (NISQ) regime where coherence limits, gate imperfections, and readout errors restrict performance. Improving calibration and mitigating errors therefore remain essential. This thesis analyzes error reduction on superconducting transmon qubits through calibration, gate analysis, and circuit-level mitigation. It compares single-qubit amplitude calibration methods and analyzes two-qubit gates based on the cross-resonance interaction, identifying differences in precision, convergence, and performance. In addition, it develops Inverted-Circuit Zero-Noise-Extrapolation (IC-ZNE) which measures effective error strength using inverted circuits. Compared to standard ZNE, IC-ZNE achieves results closer to ideal values and reduces observable errors. Overall, the presented methods improve the reliability of near-term quantum processors.