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IEEE Transactions on Applied Superconductivity

A general approach for determining the switching probability in rapid single flux quantum logic circuits

Thomas Ortlepp, Hannes Toepfer, Hermann F. Uhlmann

Published Mar 1, 2001• 9 citations
Publisher

Abstract

A major restriction in the development of a working Rapid Single Flux Quantum (RSFQ) logic circuit with high-Tc superconductors is given by the influence of thermal noise. This gives reason to ask for a general determination of the digital bit error rate. As other approaches, our method of calculating the switching probability is based on the Fokker-Planck equation. In the past few years the bit error rates for a single Josephson junction, SQUIDs and the comparator were calculated by using this theory. We demonstrate numerical solution of the multidimensional Fokker-Planck equation to calculate bit error rates due to thermal noise for a Toggle Flip Flop circuit. In the present work, we combine thermal noise analysis with the effects of process variations in order to derive rules for designing high-Tc RSFQ logic circuits.

DOI
10.1109/77.919338

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A major restriction in the development of a working Rapid Single Flux Quantum (RSFQ) logic circuit with high-Tc superconductors is given by the influence of thermal noise. This gives reason to ask for a general determination of the digital bit error rate. As other approaches, our method of calculating the switching probability is based on the Fokker-Planck equation. In the past few years the bit error rates for a single Josephson junction, SQUIDs and the comparator were calculated by using this theory. We demonstrate numerical solution of the multidimensional Fokker-Planck equation to calculate bit error rates due to thermal noise for a Toggle Flip Flop circuit. In the present work, we combine thermal noise analysis with the effects of process variations in order to derive rules for designing high-Tc RSFQ logic circuits.
The influence of thermal noise gives a major restriction in the development of Rapid Single Flux Quantum (RSFQ) logic circuits with high-T/sub c/ superconductors. In the past, we have demonstrated a general way for determining the digital bit error rate and for predicting operation ranges with good noise immunity. The method is based on a single Fokker-Planck equation which includes the full system dynamics. However, the complexity of this equation increases dramatically with the number of Josephson junctions. Our new approach describes a method to divide an RSFQ logic cell into several basic primitives. They can be characterized quickly in terms of switching probability for a lot of different parameters. From these analyses, look-up tables are built-up. We describe how to combine these data in order to achieve the bit-error rate for the whole cell. While saving more than 90% of computation time, the comparison with our previous results for full system analyses shows less than 4% difference. This approach provides for a powerful tool to include the influence of thermal noise into the optimization process of RSFQ logic circuits as well.
We model the high temperature superconductor (HTS) rapid single flux quantum (RSFQ) toggle (T) flip-flop including process variations and thermal noise. A Monte Carlo method is used to calculate the theoretical yield of the circuit at speeds ranging from 1-83 GHz and for various process parameter spreads. Thermal noise is also included in the simulations and we calculate bit error rates at 1-150 GHz as a function of temperature. Our results demonstrate quantitatively the difference between HTS layouts with and without parasitic inductance. Furthermore, our simulations suggest that using the existing HTS process with a 250 /spl mu/V I/sub c/R/sub n/ product the T flip-flop operating temperature should be below 40 K in order to obtain bit error rates less than 10/sup -6/ at gigahertz speeds.
The Rapid Single Flux Quantum electronics is a superconducting, naturally digital circuit family which is currently close to getting commercially applied.RSFQ is outstanding by its very low switching energy resulting in a very low power consumption which is the reason for a significant influence on thermal noise.For industrial applications a certain noise immunity is required which is still a challenge especially for circuits of higher complexity.In superconducting electronics resistors are the only on-chip noise sources.We analyzed the influence of each individual resistor in a toggle Flip-Flop circuit to the overall bit-error rate.The shunt resistors of comparator structures are the dominant noise sources and bias resistors have almost no influence.We analyzed in detail the types of thermal introduced switching errors of an toggle Flip-Flop which was optimized with respect to the fabrication yield.Simulation studies were accomplished to investigate the influence of circuit parameters on quality and on quantity of switching errors.By identifying and manipulating the parameters with the most significant influence on the noise susceptibility an enhanced noise immunity of the device can be achieved.The goal is to improve the robustness of RSFQ circuits against the influence of thermal noise for an specific topology by changing the circuit parameters of the device.
The discovery of the superconductive properties of magnesium diboride enables us to attempt to produce a rapid single flux quantum (RSFQ) logic device with an operation temperature of about 20 K which can be easily reached with cryocoolers. As elevated temperatures significantly increase the probability of noise-induced errors, we examine the situation in this particular temperature range. We calculate bit-error rates (BER) due to thermal noise for a toggle flip-flop as a typical RSFQ circuit with a clock frequency of 100 GHz. For this, we consider parameter spread and noise separately and observe a very low noise-induced BER. The critical margin diminishes by a small amount only.
All complex devices in rapid single flux quantum (RSFQ) technique work at much lower clock rates than possible for simple cells. New data driven self timed or asynchronous concepts can reduce this gap, but even in this case still a discrepancy between simulation and experiment is shown. It has been pointed out in previous studies, that the influence of thermal fluctuations in RSFQ circuits is divided into static and dynamic switching bit errors as well as timing jitter induced failures. The bit error rate depends exponentially on the temperature and is not the main issue in the low temperature technique. Our last results show for the first time, that the variance of the switching time is much slower decreased by reducing the temperature and is still important at 4.2 K. We describe a general method for calculating the switching time distribution for RSFQ cells. Furthermore, we present detailed results for a timing analysis of a dc/SFQ-converter. The delay between output signal and the input current ramp shows a variation over 1 ps which is more than 10% of the switching time itself. This new understanding of the background of timing jitter enables a goal-oriented improvement in the design process of RSFQ circuits.