IEEE Transactions on Applied Superconductivity

Monte Carlo and thermal noise analysis of ultra-high-speed high temperature superconductor digital circuits

Mark Jeffery, P.Y. Xie, Stephen R. Whiteley, T. Van Duzer

Published Jun 1, 1999• 50 citations

Abstract

We model the high temperature superconductor (HTS) rapid single flux quantum (RSFQ) toggle (T) flip-flop including process variations and thermal noise. A Monte Carlo method is used to calculate the theoretical yield of the circuit at speeds ranging from 1-83 GHz and for various process parameter spreads. Thermal noise is also included in the simulations and we calculate bit error rates at 1-150 GHz as a function of temperature. Our results demonstrate quantitatively the difference between HTS layouts with and without parasitic inductance. Furthermore, our simulations suggest that using the existing HTS process with a 250 /spl mu/V I/sub c/R/sub n/ product the T flip-flop operating temperature should be below 40 K in order to obtain bit error rates less than 10/sup -6/ at gigahertz speeds.

DOI: 10.1109/77.783926

Related papers

Operation of HTS Toggle-Flip-Flop Circuit With Improved Layout Design

Koji Tsubone, H. Wakana, Yoshinobu Tarutani +4 more

Toggle-flip-flop (T-FF) is one of the most important high-Tcsuperconducting single-flux quantum (HTS SFQ) circuit components and has been designed and fabricated by using YBa2Cu3O7-deltaramp-edge junction technology. The circuit layout of the T-FF was improved to suppress the junction critical current (Ic) spread in the circuit. Test circuits, which include a T-FF with a single output for evaluating the logic operation and measuring the operating frequency, were fabricated and their operation characteristics were investigated. The T-FF circuit with a single output was successfully operated and finite direct current (dc) supply current margins were obtained at temperatures from 27 to 34 K. Moreover, the maximum operating frequency of the T-FF was estimated to be 360 GHz at 4.2 K and 114 GHz at 41 K. In addition, reduction of dc supply current margins due to thermal noise was also investigated. According to the numerical simulation in which parasitic inductances were taken into account, the narrowest margin in the T-FF circuit wider than plusmn10% was maintained with a bit-error rate (BER) of 10-6up to 40 K

IEEE Transactions on Applied SuperconductivityDec 1, 200615 citations

A general approach for determining the switching probability in rapid single flux quantum logic circuits

Thomas Ortlepp, Hannes Toepfer, Hermann F. Uhlmann

A major restriction in the development of a working Rapid Single Flux Quantum (RSFQ) logic circuit with high-Tc superconductors is given by the influence of thermal noise. This gives reason to ask for a general determination of the digital bit error rate. As other approaches, our method of calculating the switching probability is based on the Fokker-Planck equation. In the past few years the bit error rates for a single Josephson junction, SQUIDs and the comparator were calculated by using this theory. We demonstrate numerical solution of the multidimensional Fokker-Planck equation to calculate bit error rates due to thermal noise for a Toggle Flip Flop circuit. In the present work, we combine thermal noise analysis with the effects of process variations in order to derive rules for designing high-Tc RSFQ logic circuits.

IEEE Transactions on Applied SuperconductivityMar 1, 20019 citations

Characterization of HTS SFQ circuits using interface-engineered Josephson junctions

K. Saitoh, Yoshihisa Soutome, Tokuumi Fukazawa +2 more

We fabricated and tested high-temperature superconducting (HTS) rapid-single-flux-quantum (RSFQ) circuits using interface-engineered Josephson junction (IEJ). The characteristics of high-speed operation were examined by voltage-divider operation based on the toggle-flip-flop circuit. An operation at 155 GHz was obtained at 15 K and the proper functioning of the voltage divider was observed up to 27 K. Temperature dependence of the maximum operation speed was analyzed by circuit simulation with thermal-noise sources. To achieve higher speed operation using a Josephson junction with a higher I/sub c/R/sub n/ product, we also fabricated an RSFQ balanced comparator using IEJ; proper switching characteristics of the circuit was confirmed up to 190 GHz at 30 K. The bias condition dependencies were studied based on the circuit simulations in the relationship of the I/sub c/R/sub n/ product. The results of circuit simulation indicate that a Josephson junction with an I/sub c/R/sub n/ product of more than 0.7 mV is required for high-speed operation (100 GHz) in high-temperature range (30-40 K). We believe that the IEJ is a promising junction candidate for realizing high-speed operation in a high-temperature range.

IEEE Transactions on Applied SuperconductivityMar 1, 200117 citations

Effects of a 20 K operation on the bit-error rates of a prospective MgB2based digital circuit

Thomas Ortlepp, Hannes Toepfer, Hermann F. Uhlmann

The discovery of the superconductive properties of magnesium diboride enables us to attempt to produce a rapid single flux quantum (RSFQ) logic device with an operation temperature of about 20 K which can be easily reached with cryocoolers. As elevated temperatures significantly increase the probability of noise-induced errors, we examine the situation in this particular temperature range. We calculate bit-error rates (BER) due to thermal noise for a toggle flip-flop as a typical RSFQ circuit with a clock frequency of 100 GHz. For this, we consider parameter spread and noise separately and observe a very low noise-induced BER. The critical margin diminishes by a small amount only.

Superconductor Science and TechnologyJul 4, 20017 citations

Measurement of the dynamic error rate of a high temperature superconductor rapid single flux quantum comparator

Ben J. Ruck, B. Oelze, Regina Dittmann +4 more

The application of high temperature superconductor (HTS) Josephson junctions in digital rapid single flux quantum circuits requires a careful study of the influence of thermal noise on the bit error rate (BER). We have determined experimentally, for the first time, the BER of a HTS rapid single flux quantum circuit. A comparator, formed by two Josephson junctions, was integrated in a Josephson transmission line ring oscillator, allowing us to perform high speed testing of the comparator at GHz frequencies. For fabrication, focused-electron-beam-irradiated junctions have been used because of their small parameter spread and excellent alignment possibilities. A BER of less than 10−11 was obtained at 39 K.

Applied Physics LettersMay 4, 199815 citations

HTS basic RSFQ cells for an optimal bit-error rate

D. Cassel, Regina Dittmann, B Kuhlmann +4 more

Thermal noise strongly influences the operation of RSFQ (rapid single flux quantum) logic circuits made of high-temperature superconductors (HTS). In the past, the circuit design was based on fabrication yield optimization. A new theoretical study using a method of general determination of the digital bit-error rate (BER) gives hope to develop such devices with a large immunity against noise. With regard to this study the design parameters of a circuit optimized with respect to fabrication yield are far from its minimum bit-error rate. Only for temperatures close to 4 K the parameters determined for fabrication yield match the parameters obtained with BER optimization. For this reason, a new reliable technology for fabrication of HTS circuits is required. We have developed a new fabrication process to serve as a basis for a proof of this new design approach. We have calculated the bit-error rate of a newly designed RSFQ chip with realistic values derived from a test chip which has been fabricated with this new multilayer technology. The new technology contains three superconductor thin films. An inductance smaller than 0.5 pH per square has been reached by using a ground plane.

Superconductor Science and TechnologyFeb 19, 20028 citations