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IEEE Transactions on Applied Superconductivity

Operation of HTS Toggle-Flip-Flop Circuit With Improved Layout Design

Koji Tsubone, H. Wakana, Yoshinobu Tarutani, Seiji Adachi, Yoshihiro Ishimaru, Kohei Nakayama, K. Tanabe

Published Dec 1, 2006• 15 citations
Publisher

Abstract

Toggle-flip-flop (T-FF) is one of the most important high-Tcsuperconducting single-flux quantum (HTS SFQ) circuit components and has been designed and fabricated by using YBa2Cu3O7-deltaramp-edge junction technology. The circuit layout of the T-FF was improved to suppress the junction critical current (Ic) spread in the circuit. Test circuits, which include a T-FF with a single output for evaluating the logic operation and measuring the operating frequency, were fabricated and their operation characteristics were investigated. The T-FF circuit with a single output was successfully operated and finite direct current (dc) supply current margins were obtained at temperatures from 27 to 34 K. Moreover, the maximum operating frequency of the T-FF was estimated to be 360 GHz at 4.2 K and 114 GHz at 41 K. In addition, reduction of dc supply current margins due to thermal noise was also investigated. According to the numerical simulation in which parasitic inductances were taken into account, the narrowest margin in the T-FF circuit wider than plusmn10% was maintained with a bit-error rate (BER) of 10-6up to 40 K

DOI
10.1109/tasc.2006.883457

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Advances in science and technology•Oct 1, 2006•1 citation
Toggle-flip-flop (T-FF) is one of the most important high-Tcsuperconducting single-flux quantum (HTS SFQ) circuit components and has been designed and fabricated by using YBa2Cu3O7-deltaramp-edge junction technology. The circuit layout of the T-FF was improved to suppress the junction critical current (Ic) spread in the circuit. Test circuits, which include a T-FF with a single output for evaluating the logic operation and measuring the operating frequency, were fabricated and their operation characteristics were investigated. The T-FF circuit with a single output was successfully operated and finite direct current (dc) supply current margins were obtained at temperatures from 27 to 34 K. Moreover, the maximum operating frequency of the T-FF was estimated to be 360 GHz at 4.2 K and 114 GHz at 41 K. In addition, reduction of dc supply current margins due to thermal noise was also investigated. According to the numerical simulation in which parasitic inductances were taken into account, the narrowest margin in the T-FF circuit wider than plusmn10% was maintained with a bit-error rate (BER) of 10-6up to 40 K
Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa 2 Cu 3 O 7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I c ) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than ±7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360GHz at 4.2K and 210GHz at 41K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10 -6 .
A Single flux quantum (SFQ) one-to-two (1:2) switch circuit was designed and fabricated by using YBa2Cu3O7-deltaramp-edge junction technology, and the logic operations were investigated. The circuit parameters were optimized by taking account of an Icspread and a global Icshift due to an operation temperature change and insufficient run-to-run reproducibility. In addition, the influence of the parasitic inductance on Icmargins was investigated by simulation. A test circuit including the 1:2 switch circuit was successfully operated at temperatures of 52 K-60 K. Finite dc supply current margins obtained at temperatures of 55 K-60 K were comparable to those determined by the simulation.
A high-Tcsuperconducting (HTS) single-flux-quantum (SFQ) logic family including an and gate, an or gate, and an inverter was designed. The circuit parameters were optimized for a Josephson junction's critical current density, which may change due to a temperature change or insufficient run-to-run reproducibility of the fabrication process. New circuit design layout rules were implemented to improve Icx uniformity. As a result, all circuits were successfully tested and show at least plusmn40% critical current density operational margins. An effect of the parasitic capacitance formed by a junction electrode and a ground plane on the operating margins of the and gate was investigated by numerical simulation. Test circuits were fabricated using YBa2Cu3O7-deltaramp-edge junction technology and were operated at temperatures higher than 30 K. Bias current margins were also measured, and they found to be close to the simulated ones.
We report a developed single-flux-quantum (SFQ) circuit fabrication process for vertically-stacked interface-treated Josephson junctions by using high-temperature superconductor (HTS) and also report the 500 GHz operation of a toggle flip-flop (TFF). As the first trial of the circuit operation, we fabricated TFF circuits, because TFF is used as a benchmark circuit to indicate potential of the circuit operating speed. To develop the circuit fabrication process, we utilized the counter YBCO layer as a wiring layer. We obtained resistively-shunted-junction behavior of single junction fabricated by new process. In addition, we observed current-voltage characteristics at the input port and the output port of the TFF, and confirmed that the input voltage coincided with twice the output voltage up to 1.1 mV at 4.2 K, which corresponds to the correct operation up to 500 GHz. This frequency is the highest value in HTS circuits ever observed, which suggests the high potential of the vertically-stacked JJs for the circuit operation.
The authors report the design, fabrication, and test results of single flux quantum (SFQ) toggle flip flop circuits. These circuits, investigated as building blocks of an HTS counting ADC, feature a directly coupled readout junction stack similar to those used in LTS RSFQ circuits. The directly coupled circuit delivers higher readout voltage, hence potentially higher operating speed than magnetically coupled alternatives. The circuits were fabricated using two multilayer HTS SNS junction integrated circuit technologies (one at Northrop Grumman and the other at TRW) featuring three YBCO depositions. Initial testing demonstrated toggling of a T-flip flop in response to SFQ pulses generated by integrated dc/SFQ converters. The readout voltage is shown to approach 40% of the junction I/sub C/R/sub N/ product, and as high as 100 /spl mu/V at 65K. Test results are compared with predicted fabrication process parameter requirements. To increase margins and tolerance to process parameter variations, improvements to the design have been made using JSpice and MALT.
YBa2Cu3O7-x(YBCO) ramp-edge junction technologies have been developed for fabricating high-operating-temperature SFQ(Single Flux Quantum) circuits. The Ic(critical current) spread that is the key parameter for integrating junctions could be decreased to 8% for a 1000-junction array that was formed on a groundplane. The background technologies that enabled this uniform junction characteristic are precise control of the counter-electrode deposition-conditions and deposition of the extremely smooth multiplayer that showed the roughness as small as 2 nm. Based upon these ramp-edge junction technologies, oxide SFQ-circuit-elements were fabricated and their logic operations were investigated. SFQ circuit elements such as a confluence buffer, a set-reset flipflop, and a toggle flipflop have been fabricated and their logic operations were measured by using an SFQ-dc converter. Both toggle flipflops that have one output and two outputs have been fabricated. These circuits could be operated up to the temperature of near 60 K under finite operating margins. These experimental results enable us to further develop fuctional and much more integrated SFQ circuits.