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Advances in science and technology

Logic Operation of SFQ Circuit Elements Made of YBCO Junctions

Y. Tarutani, Koji Tsubone, H. Wakana, Seiji Adachi, Yoshihiro Ishimaru, Ken‐ichi Nakayama, Yasuo Oshikubo, Osami Horibe, K. Tanabe

Published Oct 1, 2006• 1 citation
Publisher

Abstract

YBa2Cu3O7-x(YBCO) ramp-edge junction technologies have been developed for fabricating high-operating-temperature SFQ(Single Flux Quantum) circuits. The Ic(critical current) spread that is the key parameter for integrating junctions could be decreased to 8% for a 1000-junction array that was formed on a groundplane. The background technologies that enabled this uniform junction characteristic are precise control of the counter-electrode deposition-conditions and deposition of the extremely smooth multiplayer that showed the roughness as small as 2 nm. Based upon these ramp-edge junction technologies, oxide SFQ-circuit-elements were fabricated and their logic operations were investigated. SFQ circuit elements such as a confluence buffer, a set-reset flipflop, and a toggle flipflop have been fabricated and their logic operations were measured by using an SFQ-dc converter. Both toggle flipflops that have one output and two outputs have been fabricated. These circuits could be operated up to the temperature of near 60 K under finite operating margins. These experimental results enable us to further develop fuctional and much more integrated SFQ circuits.

DOI
10.4028/www.scientific.net/ast.47.170

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IEEE Transactions on Applied Superconductivity•Dec 1, 2006•15 citations
YBa2Cu3O7-x(YBCO) ramp-edge junction technologies have been developed for fabricating high-operating-temperature SFQ(Single Flux Quantum) circuits. The Ic(critical current) spread that is the key parameter for integrating junctions could be decreased to 8% for a 1000-junction array that was formed on a groundplane. The background technologies that enabled this uniform junction characteristic are precise control of the counter-electrode deposition-conditions and deposition of the extremely smooth multiplayer that showed the roughness as small as 2 nm. Based upon these ramp-edge junction technologies, oxide SFQ-circuit-elements were fabricated and their logic operations were investigated. SFQ circuit elements such as a confluence buffer, a set-reset flipflop, and a toggle flipflop have been fabricated and their logic operations were measured by using an SFQ-dc converter. Both toggle flipflops that have one output and two outputs have been fabricated. These circuits could be operated up to the temperature of near 60 K under finite operating margins. These experimental results enable us to further develop fuctional and much more integrated SFQ circuits.
Basic SFQ circuit components, such as SFQ-dc converter, set-reset flip-flop (RS-FF), confluence buffer and splitter, have been fabricated by the YBa/sub 2/Cu/sub 3/O/sub 7-x/-ramp-edge-junction technology and their logic operations were investigated. Circuit parameters were optimized in order to widen the margins of these oxide SFQ circuit components. The SFQ-dc converter that comprised double SQUIDs connected in series showed the output voltage as much as 0.3 mV at 22 K owing to high I/sub c/R/sub n/ value of the ramp-edge junction. Logic operations of the RS-FF, the confluence buffer and the splitter were correctly performed by using the SFQ-dc converter. Finite operating margins were obtainable for these circuits up to the temperature near 30 K.
Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa 2 Cu 3 O 7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I c ) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than ±7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360GHz at 4.2K and 210GHz at 41K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10 -6 .
Single flux quantum (SFQ) circuit components such as an SFQ-dc converter and a confluence buffer have been fabricated by using an YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// ramp-edge junction technology and their logic operations at temperatures up to near 60 K were investigated. The SFQ-dc converter was correctly operated in a wide temperature range from 4.2 K to 56 K and found to be useful for detecting output signals from other SFQ circuit components at any operating temperatures. The basic function that a signal from either of two input Josephson transmission lines (JTLs) was transmitted to an output JTL was confirmed for the confluence buffer and finite operating margins were obtained at temperatures from 42 K to 61 K. The narrowest margin of dc supply current obtained at temperatures from 55 K to 60 K was /spl plusmn/20% and was consistent with the simulation. Margin reduction due to thermal noise was also evaluated. According to the analytical calculation, the operating margin to keep the bit-error rate less than 10/sup -5/ was as large as /spl plusmn/20% even at 50 K when the value of junction critical-current I/sub c/ was kept near 0.4 mA.
We have developed a multilayer structure with a smooth surface and fabrication processes for HTS single-flux-quantum (SFQ) circuits. The multilayer structure with surface roughness Ra less than 2 nm, composed of a La0.2–Y0.9Ba1.9Cu3Ox ground plane and base electrode layer, and SrSnO3 insulating layers, was deposited by off-axis magnetron sputtering. We have fabricated interface-engineered junctions based on the multilayer structure using an La0.2–Yb0.9Ba1.9Cu3Ox counter-electrode layer prepared by pulsed laser deposition. The fabricated junctions exhibited excellent Josephson characteristics with a 1-σ spread in Ic as low as 8% for 1000 junctions. The sheet inductance values below 50 K were 0.8–1.0 pH per square. Operation of several elementary SFQ circuits including a toggle flip-flop, a confluence buffer, a set–reset flip-flop and other SFQ elements has been successfully demonstrated at 30–60 K.
A high-Tcsuperconducting (HTS) single-flux-quantum (SFQ) logic family including an and gate, an or gate, and an inverter was designed. The circuit parameters were optimized for a Josephson junction's critical current density, which may change due to a temperature change or insufficient run-to-run reproducibility of the fabrication process. New circuit design layout rules were implemented to improve Icx uniformity. As a result, all circuits were successfully tested and show at least plusmn40% critical current density operational margins. An effect of the parasitic capacitance formed by a junction electrode and a ground plane on the operating margins of the and gate was investigated by numerical simulation. Test circuits were fabricated using YBa2Cu3O7-deltaramp-edge junction technology and were operated at temperatures higher than 30 K. Bias current margins were also measured, and they found to be close to the simulated ones.
Toggle-flip-flop (T-FF) is one of the most important high-Tcsuperconducting single-flux quantum (HTS SFQ) circuit components and has been designed and fabricated by using YBa2Cu3O7-deltaramp-edge junction technology. The circuit layout of the T-FF was improved to suppress the junction critical current (Ic) spread in the circuit. Test circuits, which include a T-FF with a single output for evaluating the logic operation and measuring the operating frequency, were fabricated and their operation characteristics were investigated. The T-FF circuit with a single output was successfully operated and finite direct current (dc) supply current margins were obtained at temperatures from 27 to 34 K. Moreover, the maximum operating frequency of the T-FF was estimated to be 360 GHz at 4.2 K and 114 GHz at 41 K. In addition, reduction of dc supply current margins due to thermal noise was also investigated. According to the numerical simulation in which parasitic inductances were taken into account, the narrowest margin in the T-FF circuit wider than plusmn10% was maintained with a bit-error rate (BER) of 10-6up to 40 K