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IEEE Transactions on Applied Superconductivity

An RSFQ Superconductive Programmable Gate Array

Coenrad Johann Fourie, H. van Heerden

Published Jun 1, 2007• 16 citations
Publisher

Abstract

Field-programmable gate arrays (FPGAs) allow circuit reconfiguration in the field, which adds to the flexibility of electronic systems. Applied to superconductive electronics, reprogrammability allows system functionality to be changed without remanufacturing the circuit or dismantling a cryogenic setup. We discuss the design issues relevant to a superconducting programmable gate array (SPGA), and report an elementary 4200-junction SPGA. The SPGA is built around interconnected 2-input logic blocks which contain 4-bit lookup tables. Designs for the programming frame, address decoding, lookup tables and switch implementations are discussed, together with design constraints imposed by the unidirectional nature and large size of single flux quantum (SFQ) transmission lines.

DOI
10.1109/tasc.2007.897387

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Field-programmable gate arrays (FPGAs) allow circuit reconfiguration in the field, which adds to the flexibility of electronic systems. Applied to superconductive electronics, reprogrammability allows system functionality to be changed without remanufacturing the circuit or dismantling a cryogenic setup. We discuss the design issues relevant to a superconducting programmable gate array (SPGA), and report an elementary 4200-junction SPGA. The SPGA is built around interconnected 2-input logic blocks which contain 4-bit lookup tables. Designs for the programming frame, address decoding, lookup tables and switch implementations are discussed, together with design constraints imposed by the unidirectional nature and large size of single flux quantum (SFQ) transmission lines.
Recent advances in fabrication complexity and density-especially for the Institute of Advanced Industrial Science and Technology (AIST) advanced process 2 (ADP2) process and the MIT Lincoln Lab (MITLL) SFQ5ee process and beyond-allow the implementation of a superconducting field-programmable gate array (SFPGA) with sufficient complexity to host a number of different programmed functions. We discuss design choices for an all single flux quantum SFPGA targeting these modern processes, making heavy use of passive transmission line (PTL) layers they provide. Various configurations for lookup tables, basic logic elements and timing schemes are shown, and a viable switch block implementation is discussed. Academic FPGA electronic design automation (EDA) tools are repurposed for mapping Verilog hardware description language (HDL) functions to the chosen SFPGA design, whilst HDL and electrical simulations are used to show its correct operation. We show simulations for programming and the operation of an SFPGA, and discuss die size requirements for practical implementation.
Field Programmable gate arrays (FPGAs) are one of the most successful circuits in the semiconductor industry. In the absence of a reliable three-terminal switch like MOSFET for rapid single flux quantum(RSFQ) technology, it was difficult to implement FPGA like reconfiguralbe circuits. However, a recently proposed superconducting magnetic FPGA (SMFPGA) implements a controllable switch by controlling the critical current of magnetic Josephson Junctions (MJJs) placed in energy-efficient RSFQ bias network. For implementing a configurable logic block (CLB) with a smaller area for the said FPGA, we designed a reconfigurable gate that can implement four basic logical functions: AND, OR, XOR and NOT. The programmability to implement the four functions is achieved by introducing MJJs in the circuit at specific locations and programming their critical current. The gate is made reconfigurable by having the ability to change both the bias current at different ports and the critical current of a JJ in the gate to two different values. This makes the size of CLB ten times smaller compared to the earlier design and simplifies the SMFPGA. We describe the design methodology and the simulation results of the reconfigurable gate.
Field-programmable gate arrays (FPGAs) provide a significantly cheaper solution for various applications in traditional semiconductor electronics. Single flux quantum (SFQ) technologies are developing rapidly and the availability of SFQ-specific FPGA will be very useful. Towards developing such an SFQ-specific FPGA, new designs of FPGA subcircuits for both synchronous and asynchronous operation of SFQ circuits are presented in this paper. Magnetic Josephson junctions (MJJs) are used as bias limiting junctions in energy-efficient rapid SFQ (ERSFQ) biasing to implement programmable switches in various subcircuits of the proposed FPGA fabric. Designs of all FPGA subcircuits are developed and are verified through circuit simulation. Verilog hardware description language (HDL) models are also developed for all FPGA circuit blocks to facilitate large-scale FPGA simulations for the implementation of the desired circuit on the proposed FPGA fabric. Designs of a few subcircuits with switches based on nondestructive readout cell are also given in the current paper for better comparison with MJJ switch based counterparts. Programming of MJJ-based switches is based on the ability to control the critical current of MJJs externally. Recent implementations of SFQ decoder is proposed for accessing individual MJJs through the current lines in a crossbar structure. Estimations for the area and power consumption are much better in comparison to previous attempts at designing an SFQ specific FPGA.
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient, high- performance information processing systems because it has significantly low power consumption due to the adiabatic switching of Josephson junctions. We are developing a high-performance field-programmable gate array (FPGA) using superconducting AQFP circuits to reduce its energy consumption. The all-AQFP FPGA consists of logic blocks, switch blocks, connection blocks, and memory using AQFP circuits. In particular, the memory is composed of AQFP buffer chains, enabling high-density and low-power memory. The switch blocks can perform data routing as well as several logic functions, including majority,and, andorfunctions, which increases the design flexibility of the all-AQFP FPGA. We fabricated a one-unit all-AQFP FPGA and demonstrated its reconfigurable operation at low speed. It was found that much lower power consumption can be achieved in the new FPGA than in the other superconducting FPGAs.
Novel reconfigurable superconductive single flux quantum (SFQ) logic devices, the functions of which can be dynamically reconfigured by inputting control signals, have been investigated. The characteristics of single flux quantum circuits can be easily modulated by applying currents or magnetic fields because of the high sensitivity of superconductive circuits. We investigated several design approaches for the realization of dynamically reconfigurable SFQ logic devices. We employed direct current injection to the logic gate using a non-destructive read-out flip-flop. By changing the internal state of the non-destructive read-out flip-flop, the logic function can be dynamically reconfigured. We have designed and tested a dynamically reconfigurable Josephson transmission line (JTL)/delay flip-flop (DFF) circuit. The measured dc bias margin was 72.5-107.2%. Furthermore, we have demonstrated the operation of a variable bit-length shift register, composed of the dynamically reconfigurable JTL/DFF circuits. The investigated design approach can be applied to more sophisticated dynamically reconfigurable single flux quantum logic gates.
Design and manufacturing of superconductive electronics have been evolving over the past three decades with significant progress made in related fields. Rapid single flux quantum (RSFQ) logic circuits have become popular among superconductive logic families and its energy-efficient variants (ERSFQ and eSFQ) have shown promise as an ultra lowpower and high-speed circuit fabric. SFQ circuits have been demonstrated at tens of GHz with an energy consumption of an attojoule per gate. There are many differences between SFQ and conventional CMOS circuits. SFQ logic circuits are based on the manipulation of the quantized magnetic flux pulses. Most of the logic gates are sequential in nature requiring the clock to be distributed to every logic gate. SFQ logic gates have no gain and hence splitters are needed to drive multiple fanouts. Design and successful demonstration of a controllable superconducting switch and a compact reliable memory element have evaded researchers so far. This paper starts by describing key differences between SFQ logic and conventional CMOS and concludes by listing key challenges that must be overcome to achieve the very large scale integration of SFQ circuits and make the demonstration of a superconductive CPU a reality.