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IEEE Transactions on Applied Superconductivity

20 ${\hbox{kA/cm}}^{2}$ Process Development for Superconducting Integrated Circuits With 80 GHz Clock Frequency

Sergey K. Tolpygo, Daniel T. Yohannes, R. T. Hunt, John A. Vivalda, D. Donnelly, Denis Amparo, Alex F. Kirichenko

Published Jun 1, 2007• 72 citations
Publisher

Abstract

Results of the development of an advanced fabrication process for superconductor integrated circuits (ICs) with 20 kA/cm2Nb/AlOx/Nb Josephson junctions is presented. The process has 4 niobium superconducting layers, one MoNxresistor layer with 4.0 Ohm per square sheet resistance for the junction shunting and circuit biasing, and employs circular Josephson junctions with the minimum diameter of 1 mum; total 11 photolithography levels. The goal of this process development is the demonstration of the feasibility of 80 GHz clock speeds in superconducting ICs for digital signal processing (DSP) and high performance computing. Basic components of rapid single flux quantum (RSFQ) logic such as DC/SFQ, SFQ/DC converters, Josephson transmission lines (JTLs), and simple digital circuits such as T-flip-flops and 4-bit digital counters have been fabricated and tested. The T-flip-flops were shown to operate up to 400 GHz with the widest margin of operation of plusmn13% at 325 GHz. Digital testing results on the 4-bit counters as well as the junctions, resistors, and other process parameters are also presented. Prospects for yet higher speeds and very large scale integration are discussed.

DOI
10.1109/tasc.2007.898571

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20 kA/cm2{\hbox{kA/cm}}^{2}kA/cm2 Process Development for Superconducting Integrated Circuits With 80 GHz Clock Frequency
Results of the development of an advanced fabrication process for superconductor integrated circuits (ICs) with 20 kA/cm2Nb/AlOx/Nb Josephson junctions is presented. The process has 4 niobium superconducting layers, one MoNxresistor layer with 4.0 Ohm per square sheet resistance for the junction shunting and circuit biasing, and employs circular Josephson junctions with the minimum diameter of 1 mum; total 11 photolithography levels. The goal of this process development is the demonstration of the feasibility of 80 GHz clock speeds in superconducting ICs for digital signal processing (DSP) and high performance computing. Basic components of rapid single flux quantum (RSFQ) logic such as DC/SFQ, SFQ/DC converters, Josephson transmission lines (JTLs), and simple digital circuits such as T-flip-flops and 4-bit digital counters have been fabricated and tested. The T-flip-flops were shown to operate up to 400 GHz with the widest margin of operation of plusmn13% at 325 GHz. Digital testing results on the 4-bit counters as well as the junctions, resistors, and other process parameters are also presented. Prospects for yet higher speeds and very large scale integration are discussed.
The Superconductivity Research Laboratory has successfully fabricated large quantities of single flux quantum (SFQ) large scale integrated circuits, including several thousands of Josephson junctions (JJs). Using a Jc = 2.5 kA cm−2 process in which the number of Nb layers was four and the minimum JJ size was 2 µm square. We developed a new advanced fabrication process that produced a Jc = 10 kA cm−2, nine Nb layers and a minimum JJ size of 1 µm square. The increase in the number of Nb layers was achieved by using a planarization technique. The target of our next generation process is a Jc = 40 kA cm−2 with a 0.5 µm square for the minimum junction size. This specification will be achieved by using advanced semiconductor technologies. This process will enable SFQ circuits to be produced with one million JJs on a chip and achieve a clock frequency greater than 100 GHz.
Rapid Single-Flux-Quantum Circuits Fabricated Using 20-kA/cm2\hbox{20}\hbox{-}\hbox{kA}/\hbox{cm}^{2}20-kA/cm2 Nb/AlOx/Nb\hbox{Nb}/\hbox{AlO}_{x}/\hbox{Nb}Nb/AlOx​/Nb Process
We designed and fabricated rapid single-flux-quantum (RSFQ) circuits using a new 20-kA/cm2process based on conventional Nb/AlOx/Nb Josephson junction (JJ) technology. Circular JJs were fabricated to improve their uniformity. They had sufficiently low spread of the critical currents for large-scale RSFQ circuits. We selected the circuit design parameters carefully, including the bias voltage and McCumber-Stewart parameter, balancing the energy consumption, switching speeds, margins, and integration density. We demonstrated several logic gates and shift registers at a clock frequency of 154 GHz with the designed bias voltage of 2.5 mV, and demonstrated energy-efficient shift registers using the low-voltage RSFQ (LV-RSFQ) technique at 83 GHz.
AbstractSuperconducting digital technology based on Rapid Single Flux Quantum (RSFQ) logic offers a 50 times faster clock rate and 100 times less on chip power consumption than today's mainstream semiconductor electronics. This technology is attractive for many applications and in particular for Digital Signal Processing (DSP). The applications of the RSFQ DSPs are numerous and include multi-user detection in spread spectrum system, channel equalization for Multi-in, Multi-out (MIMO) systems, and blind detection and signal tracking for signal intelligence.At Chalmers we are developing a hybrid DSP with target performance of 30 giga operations per second. It consists of an RSFQ Multiply Accumulate unit (MAC), RSFQ fast cache memory, and an external semiconductor memory. The development of the complex high speed cryogenic digital system requires interface, packaging and testing solutions. The main difficulties are due to the 4 K operational temperature, the high magnetic field sensitivity of the RSFQ circuits, the multi-channel high bandwidth interface required in the hybrid architecture, and the high speed RSFQ digital core. The key steps towards addressing each of these problems are the subject of this thesis. The main emphasis is put on the experimental testing and interfacing of superconductor electronics. A large part of the work is connected to the experimental verification of DSP components and their incremental improvement towards functionality. The RSFQ circuits tested were fabricated using the four-metal layer VLSI processes available from NGST(8 kA/cm^2 Josephson junction critical current) and HYPRES (both 1 kA/cm^2 and HYPRES 4.5 kA/cm^2. The main results of the work are demonstrations of the RSFQ cache memory with more than 2,000 Josephson junctions, 33.5 GHz operation of the digital clock controller, and 20.48 GHz operation of the autocorrelator. In addition, various experiments have been done for investigation of parasitic effects in RSFQ circuits such as flux trapping and influence of the high current bias lines.At the final stage of the work, a unique high bandwidth 4 K cryocooler based experimental setup has been developed. The system, developed in close cooperation with Hypres Inc. USA, has 40 high speed I/Os with bandwidth of 2 Gbps, 64 DC bias channels, 4 high frequency clock lines, and 4 auxiliary control lines. It supports exchangeable test units for 10 mm x 10 mm and 20 mm x 20 mm Multi Chip Module (MCM) carriers. The availability of such a system is critical to demonstration of the hybrid DSP prototype and future commercialization.
Rapid-Single-Flux-Quantum (RSFQ) digital circuits based on shunted Josephson junctions have been shown to be able to digitally process signals up to several hundreds GHz. The principle of operation is based on the generation, transport and processing of picosecond voltage pulses of 2.07 mV.ps quantized area, which corresponds to one quantum flux h/2e. Operation of RSFQ circuits can be performed with clock frequencies of the order of 20 to 50 GHz with present technology. We will present current developments and experimental results obtained so far, based on circuits developed in the JeSEF RSFQ process of IPHT Jena, using a 1 kA/cm2 shunted Nb/Al-AlOx/Nb junctions. Some particular potential applications for space will be emphasized
A new generation of the Josephson digital circuits-rapid single flux quantum (RSFQ) devices-based on overdamped externally shunted high quality Nb-AlO x -Nb tunnel junctions have been designed, fabricated and experimentally investigated. All-refractory material 11-layer 5 mu m integrated technology has been successfully employed for the preparation of the RSFQ microcircuits. The T flip-flop has been demonstrated to operate properly up to clock frequencies of 100 GHz at 25% margins. The proper operation of the buffer stage for a one-directional SFQ pulse transmission at clock frequencies up to 125 GHz has been achieved. The possibilities to convert the information from the usual DC form to SFQ and vice versa have been demonstrated. An output signal in an SFQ/DC converter as high as 220 mu V has been measured. A new counter type A/D converter which includes a comparator and reversible binary counter with DC outputs has been fabricated and tested. The proposed ADC seems to be very promising for high-accuracy measurement of medium-bandwidth signals. The possibilities of creating a number of SFQ devices with outstanding parameters are discussed.
A single flux quantum (SFQ) logic cell library has been developed for the 10kA/cm2 Nb multi-layer fabrication process to efficiently design large-scale SFQ digital circuits. In the new cell library, the critical current density of Josephson junctions is increased from 2.5kA/cm2 to 10kA/cm2 compared to our conventional cell library, and the McCumber-Stwart parameter of each Josephson junction is increased to 2 in order to increase the circuit operation speed. More than 300 cells have been designed, including fundamental logic cells and wiring cells for passive interconnects. We have measured all cells and confirmed they stably operate with wide operating margins. On-chip high-speed test of the toggle flip-flop (TFF) cell has been performed by measuring the input and output voltages. The TFF cell at the input frequency of up to 400GHz was confirmed to operate correctly. Also, several fundamental digital circuits, a 4-bit concurrent-flow shift register and a bit-serial adder have been designed using the new cell library, and the correct operations of the circuits have been demonstrated at high clock frequencies of more than 100GHz.