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IEEE Transactions on Applied Superconductivity

Fabrication of RS flip-flops using Y-Ba-Cu-O ramp-edge junctions and their operation

J.H. Park, Jangho Kim, Gun Yong Sung, Chang‐Hoon Kim, Kuyoul Jung, J.H. Kang, T. S. Hahn

Published Mar 1, 2001• 4 citations
Publisher

Abstract

We fabricated single flux quantum RS flip-flop circuits by using ramp-edge Josephson junctions and tested their performance. The junctions were constructed with two Y/sub 1/Ba/sub 2/Cu/sub 3/O/sub 7-x/ (YBCO) electrodes and a barrier layer. As barrier materials we used cobalt-doped YBCO. To insulate between YBCO layers we used Sr/sub 2/AlTaO/sub 6/ (SAT) thin films. We also fabricated RS flip-flop circuits by using YBCO ground planes to reduce the inductance of YBCO film. The fabricated Josephson junctions showed typical RSJ-like current-voltage (I-V) characteristics above 50 K. We could successfully demonstrate the correct operation of the RS flip-flop circuits at the temperatures near 50 K. We used a computer controlled digital measurement set-up to test the circuits. The RS flip-flop circuit fabricated on a ground plane showed more definite set and reset states on the voltage-flux (V-/spl phi/) modulation curves of the read SQUID than those of the circuit made without ground plane. This may be attributed to the shielding effect by a YBCO ground plane.

DOI
10.1109/77.919498

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Advances in science and technology•Oct 1, 2006•1 citation
We fabricated single flux quantum RS flip-flop circuits by using ramp-edge Josephson junctions and tested their performance. The junctions were constructed with two Y/sub 1/Ba/sub 2/Cu/sub 3/O/sub 7-x/ (YBCO) electrodes and a barrier layer. As barrier materials we used cobalt-doped YBCO. To insulate between YBCO layers we used Sr/sub 2/AlTaO/sub 6/ (SAT) thin films. We also fabricated RS flip-flop circuits by using YBCO ground planes to reduce the inductance of YBCO film. The fabricated Josephson junctions showed typical RSJ-like current-voltage (I-V) characteristics above 50 K. We could successfully demonstrate the correct operation of the RS flip-flop circuits at the temperatures near 50 K. We used a computer controlled digital measurement set-up to test the circuits. The RS flip-flop circuit fabricated on a ground plane showed more definite set and reset states on the voltage-flux (V-/spl phi/) modulation curves of the read SQUID than those of the circuit made without ground plane. This may be attributed to the shielding effect by a YBCO ground plane.
We have designed, fabricated and successfully tested three SFQ elements: a toggle flip-flop, a SFQ voltage amplifier, and an RS-flip-flop. The design uses a single superconducting layer and it is optimized by repeated computer simulations and repeated inductance calculations. The inductances are made as narrow slits of 0.5 /spl mu/m width. Their values are calculated numerically taking into account material parameters derived from experiment. The YBCO junctions are either of step edge type on LaAlO/sub 3/ substrates or located on two closely spaced bi-crystal grain boundaries on a novel YSZ tricrystal substrate. Carbon masks were used to form steps on LaAlO/sub 3/ substrates and for the YBCO patterning. Voltage amplifier shows operation up to 60 K, and both flip-flops were observed to operate at temperatures up to 30 K with parameters close to the simulated values. The operation frequency of a T-flip-flop cell of about 150 GHz was achieved and a new measurement technique of the margins of an RS trigger is suggested.
We designed and fabricated a rapid-single-flux-quantum T flip-flop (TFF) with high- T c interface-engineered Josephson junctions. Y 1 Ba 2 Cu 3 O 7− d and Sr 2 AlTaO 6 were deposited for the superconducting layer and the insulating layer, respectively. The Josephson junction was formed through an interface treatment process using Ar ion milling and vacuum annealing. We simulated a TFF circuit and designed a physical layout using WRspice and Xic. The fabricated TFF has a minimum junction width of 3 μm. Through the measurement of the voltage divider operation, the maximum operation frequency was estimated to be 53 GHz at 22 K and 106 GHz at 12 K.
Basic SFQ circuit components, such as SFQ-dc converter, set-reset flip-flop (RS-FF), confluence buffer and splitter, have been fabricated by the YBa/sub 2/Cu/sub 3/O/sub 7-x/-ramp-edge-junction technology and their logic operations were investigated. Circuit parameters were optimized in order to widen the margins of these oxide SFQ circuit components. The SFQ-dc converter that comprised double SQUIDs connected in series showed the output voltage as much as 0.3 mV at 22 K owing to high I/sub c/R/sub n/ value of the ramp-edge junction. Logic operations of the RS-FF, the confluence buffer and the splitter were correctly performed by using the SFQ-dc converter. Finite operating margins were obtainable for these circuits up to the temperature near 30 K.
We fabricated reset-set (RS) flip-flops and shift registers by using YBCO bicrystal junctions and tested their operations by using a computer-controlled digital measurement set-up and an analog measurement set-up. The RS flip-flop circuits operated successfully at temperatures up to 71 K. The RS flip-flop circuit was observed over 600 computer-generated clock cycles with nearly no errors. The circuits were reset or set during each clock cycle. By using an analog measurement technique, we operated the RS flip-flop circuits at frequencies of up to 500 Hz. Since our probe was not designed for high speed operation, the test speed was limited to this frequency. Although we could not operate the shift register completely, we observed flux propagation in the shift register.
Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa 2 Cu 3 O 7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I c ) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than ±7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360GHz at 4.2K and 210GHz at 41K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10 -6 .
YBa2Cu3O7-x(YBCO) ramp-edge junction technologies have been developed for fabricating high-operating-temperature SFQ(Single Flux Quantum) circuits. The Ic(critical current) spread that is the key parameter for integrating junctions could be decreased to 8% for a 1000-junction array that was formed on a groundplane. The background technologies that enabled this uniform junction characteristic are precise control of the counter-electrode deposition-conditions and deposition of the extremely smooth multiplayer that showed the roughness as small as 2 nm. Based upon these ramp-edge junction technologies, oxide SFQ-circuit-elements were fabricated and their logic operations were investigated. SFQ circuit elements such as a confluence buffer, a set-reset flipflop, and a toggle flipflop have been fabricated and their logic operations were measured by using an SFQ-dc converter. Both toggle flipflops that have one output and two outputs have been fabricated. These circuits could be operated up to the temperature of near 60 K under finite operating margins. These experimental results enable us to further develop fuctional and much more integrated SFQ circuits.