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IEEE Transactions on Applied Superconductivity

Digital and analog measurements of HTS SFQ RS flip-flops and shift register circuits

Y.H. Kim, J.H. Kang, Gun Yong Sung, J.H. Park, J.M. Lee, Kuyoul Jung, Chang‐Hoon Kim, T. S. Hahn, Sang Sam Choi

Published Jun 1, 1999• 5 citations
Publisher

Abstract

We fabricated reset-set (RS) flip-flops and shift registers by using YBCO bicrystal junctions and tested their operations by using a computer-controlled digital measurement set-up and an analog measurement set-up. The RS flip-flop circuits operated successfully at temperatures up to 71 K. The RS flip-flop circuit was observed over 600 computer-generated clock cycles with nearly no errors. The circuits were reset or set during each clock cycle. By using an analog measurement technique, we operated the RS flip-flop circuits at frequencies of up to 500 Hz. Since our probe was not designed for high speed operation, the test speed was limited to this frequency. Although we could not operate the shift register completely, we observed flux propagation in the shift register.

DOI
10.1109/77.783859

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IEEE Transactions on Applied Superconductivity•Dec 1, 2006•15 citations
We fabricated reset-set (RS) flip-flops and shift registers by using YBCO bicrystal junctions and tested their operations by using a computer-controlled digital measurement set-up and an analog measurement set-up. The RS flip-flop circuits operated successfully at temperatures up to 71 K. The RS flip-flop circuit was observed over 600 computer-generated clock cycles with nearly no errors. The circuits were reset or set during each clock cycle. By using an analog measurement technique, we operated the RS flip-flop circuits at frequencies of up to 500 Hz. Since our probe was not designed for high speed operation, the test speed was limited to this frequency. Although we could not operate the shift register completely, we observed flux propagation in the shift register.
Single flux quantum (SFQ) circuit elements have been designed and fabricated using the YBa 2 Cu 3 O 7-δ ramp-edge junction technology. Logic operations of SFQ circuit elements, such as a toggle flip-flop (T-FF), a set-reset flip-flop (RS-FF), and a 96-junction Josephson transmission line (JTL), were successfully demonstrated, and dc supply current margins were confirmed up to temperatures higher than 30 K. The circuit layout was improved in order to suppress the critical current (I c ) spread that appears during the junction fabrication procedure. By employing the new circuit layout rule, correct operations at temperatures from 27 K to 34 K with dc supply current margins wider than ±7% were confirmed for the T-FF with a single output. Moreover, the maximum operating frequencies of T-FFs were measured to be 360GHz at 4.2K and 210GHz at 41K, which are substantially higher than the values for the circuits with the conventional layout. According to the simulation result, the maximum operating frequency at 40 K was expected to be approximately 50% of the characteristic frequency at a bit error rate (BER) less than 10 -6 .
We fabricated single flux quantum RS flip-flop circuits by using ramp-edge Josephson junctions and tested their performance. The junctions were constructed with two Y/sub 1/Ba/sub 2/Cu/sub 3/O/sub 7-x/ (YBCO) electrodes and a barrier layer. As barrier materials we used cobalt-doped YBCO. To insulate between YBCO layers we used Sr/sub 2/AlTaO/sub 6/ (SAT) thin films. We also fabricated RS flip-flop circuits by using YBCO ground planes to reduce the inductance of YBCO film. The fabricated Josephson junctions showed typical RSJ-like current-voltage (I-V) characteristics above 50 K. We could successfully demonstrate the correct operation of the RS flip-flop circuits at the temperatures near 50 K. We used a computer controlled digital measurement set-up to test the circuits. The RS flip-flop circuit fabricated on a ground plane showed more definite set and reset states on the voltage-flux (V-/spl phi/) modulation curves of the read SQUID than those of the circuit made without ground plane. This may be attributed to the shielding effect by a YBCO ground plane.
We fabricated a 4 stage single flux quantum shift register with YBa/sub 2/Cu/sub 3/O/sub x/ (YBCO) bicrystal Josephson junctions and demonstrated the circuit's low error operation by using a computer controlled digital measurement set-up. The circuit was operated at 65 K. Binary data sequences of "1000", "1010", "1011," and "1111" were successfully loaded and shifted in the circuit. The two read SQUIDs placed next to each side of the shift register were used to sense all the individual data states. By operating the circuit with the proper current pulses, we observed no errors during 16 hours, which is equivalent to 21,000 error-free data shifts. We also found that temperature dependent inductance and junction critical currents limit the operating temperature range of the circuit, and the effective thermal noise temperature can be lower than 100 K.
We have designed, fabricated and successfully tested three SFQ elements: a toggle flip-flop, a SFQ voltage amplifier, and an RS-flip-flop. The design uses a single superconducting layer and it is optimized by repeated computer simulations and repeated inductance calculations. The inductances are made as narrow slits of 0.5 /spl mu/m width. Their values are calculated numerically taking into account material parameters derived from experiment. The YBCO junctions are either of step edge type on LaAlO/sub 3/ substrates or located on two closely spaced bi-crystal grain boundaries on a novel YSZ tricrystal substrate. Carbon masks were used to form steps on LaAlO/sub 3/ substrates and for the YBCO patterning. Voltage amplifier shows operation up to 60 K, and both flip-flops were observed to operate at temperatures up to 30 K with parameters close to the simulated values. The operation frequency of a T-flip-flop cell of about 150 GHz was achieved and a new measurement technique of the margins of an RS trigger is suggested.
The authors report the design, fabrication, and test results of single flux quantum (SFQ) toggle flip flop circuits. These circuits, investigated as building blocks of an HTS counting ADC, feature a directly coupled readout junction stack similar to those used in LTS RSFQ circuits. The directly coupled circuit delivers higher readout voltage, hence potentially higher operating speed than magnetically coupled alternatives. The circuits were fabricated using two multilayer HTS SNS junction integrated circuit technologies (one at Northrop Grumman and the other at TRW) featuring three YBCO depositions. Initial testing demonstrated toggling of a T-flip flop in response to SFQ pulses generated by integrated dc/SFQ converters. The readout voltage is shown to approach 40% of the junction I/sub C/R/sub N/ product, and as high as 100 /spl mu/V at 65K. Test results are compared with predicted fabrication process parameter requirements. To increase margins and tolerance to process parameter variations, improvements to the design have been made using JSpice and MALT.
Toggle-flip-flop (T-FF) is one of the most important high-Tcsuperconducting single-flux quantum (HTS SFQ) circuit components and has been designed and fabricated by using YBa2Cu3O7-deltaramp-edge junction technology. The circuit layout of the T-FF was improved to suppress the junction critical current (Ic) spread in the circuit. Test circuits, which include a T-FF with a single output for evaluating the logic operation and measuring the operating frequency, were fabricated and their operation characteristics were investigated. The T-FF circuit with a single output was successfully operated and finite direct current (dc) supply current margins were obtained at temperatures from 27 to 34 K. Moreover, the maximum operating frequency of the T-FF was estimated to be 360 GHz at 4.2 K and 114 GHz at 41 K. In addition, reduction of dc supply current margins due to thermal noise was also investigated. According to the numerical simulation in which parasitic inductances were taken into account, the narrowest margin in the T-FF circuit wider than plusmn10% was maintained with a bit-error rate (BER) of 10-6up to 40 K