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Journal of Micromechanics and Microengineering

Design, microfabrication and characterization of planarized multilayer atom chips with enhanced heat dissipation

Ho‐Chiao Chuang, Chung-Wen Weng, Hsiang-Fu Li

Published Nov 3, 2011• 8 citations
Publisher

Abstract

This paper describes the design and fabrication of planarized multilayer atom chips for an ultrahigh-vacuum system in atomic physics experiments. A fabrication process is developed to define micrometer-scale wire patterns on a silicon substrate and wires are plated by copper electroplating. SU-8 is chosen as the isolation layer between the upper and bottom wires, and its thickness, surface flatness and surface roughness (Ra = 5 nm) are controlled by the chemical–mechanical planarization process. A reflectivity of nearly 90% is measured on the chip surface; thus, the former method of attaching a silver mirror is unnecessary (Du et al 2004 Phys. Rev. A 70 053606). A heat dissipation copper block is incorporated in our chip design to increase the sustainable current densities of upper wires of more than 3.8 × 105 A cm−2. Results show the improvement of 55.74%, compared with the nonheat dissipation design (2.44 × 105 A cm−2), and thus meeting the requirements for chip-based atom trapping experiments.

DOI
10.1088/0960-1317/21/12/125009

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This paper describes the design and fabrication of an atom chip for atom tunneling experiments. A fabrication process was developed that uses a combination of UV-optical and Electron-Beam lithography to pattern micrometer and nanometer scale copper wires on a single chip. The minimum wire width fabricated in this work is 200 nm. The wires can carry current densities of more than 7.5times107A/cm2. The electrical current tests establish the feasibility of realizing chip-based atom tunneling experiments.
Atom chips are robust and extremely powerful toolboxes for quantum optical experiments, since they make it possible to create exceedingly precise magnetic traps for neutral atoms with minimal field modulations. Accurate manipulation of trapped atoms is feasible with magnetic and electric fields created on the atom chip. Therefore atom chips with high quality surfaces and extremely well defined wires were build (roughness < 20nm). Furthermore new generations of atom chips were developed, like the multi-layer atom chip with contact-free wire crossings, the sub-micron structured atom chip and the semiconducting atom chip. Extensive characterisation measurements of atom chip wires demonstrated that the wires stand current densities of up to 10^7A/cm^2 for seconds and voltage differences of more than 500V over 10µm. From the different materials tested doped silicon with a thin silicon dioxide layer is the best qualified substrate for atom chip fabrication. The atom chips fabricated during this thesis have been used in many successful experiments, yielding numerous results. Moreover this thesis established the basics for many further experiments in atom physics and quantum optics and delivers complete instructions for the fabrication of all developed atom chips as well as an introduction to the experiments.
We present the use of direct bonded copper (DBC) for the straightforward fabrication of high power atom chips. Atom chips using DBC have several benefits: excellent copper/substrate adhesion, high purity, thick (>100 μm) copper layers, high substrate thermal conductivity, high aspect ratio wires, the potential for rapid (<8 h) fabrication, and three-dimensional atom chip structures. Two mask options for DBC atom chip fabrication are presented, as well as two methods for etching wire patterns into the copper layer. A test chip, able to support 100 A of current for 2 s without failing, is used to determine the thermal impedance of the DBC. An assembly using two DBC atom chips is used to magnetically trap laser cooled (87)Rb atoms. The wire aspect ratio that optimizes the magnetic field gradient as a function of power dissipation is determined to be 0.84:1 (height:width).
Neutral atoms can be trapped and manipulated with surface mounted microscopic current carrying and charged structures. We present a lithographic fabrication process for such atom chips based on evaporated metal films. The size limit of this process is below 1 μm. At room temperature, thin wires can carry current densities of more than 107A∕cm2 and voltages of more than 500 V. Extensive test measurements for different substrates and metal thicknesses (up to 5 μm) are compared to models for the heating characteristics of the microscopic wires. Among the materials tested, we find that Si is the best suited substrate for atom chips.
An atom chip has been fabricated for the study of interactions between 87^{87}87Rb Rydberg atoms and a Au surface. The chip tightly confines cold atoms by generating high magnetic field gradients using microfabricated current-carrying wires. These trapped atoms may be excited to Rydberg states at well-defined atom-surface distances. For the purpose of Rydberg atom-surface interaction studies, the chip has a thermally evaporated Au surface layer, separated from the underlying trapping wires by a planarizing polyimide dielectric. Special attention was paid to the edge roughness of the trapping wires, the planarization of the polyimide, and the grain structure of the Au surface.