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Sensors

The Design, Fabrication and Characterization of a Transparent Atom Chip

Ho‐Chiao Chuang, Chia-Shiuan Huang, Hung-Pin Chen, Chi-Sheng Huang, Yu-Hsin Lin

Published Jun 11, 2014• 3 citations
Publisher

Abstract

This study describes the design and fabrication of transparent atom chips for atomic physics experiments. A fabrication process was developed to define the wire patterns on a transparent glass substrate to create the desired magnetic field for atom trapping experiments. An area on the chip was reserved for the optical access, so that the laser light can penetrate directly through the glass substrate for the laser cooling process. Furthermore, since the thermal conductivity of the glass substrate is poorer than other common materials for atom chip substrate, for example silicon, silicon carbide, aluminum nitride. Thus, heat dissipation copper blocks are designed on the front and back of the glass substrate to improve the electrical current conduction. The testing results showed that a maximum burnout current of 2 A was measured from the wire pattern (with a width of 100 μm and a height of 20 μm) without any heat dissipation design and it can increase to 2.5 A with a heat dissipation design on the front side of the atom chips. Therefore, heat dissipation copper blocks were designed and fabricated on the back of the glass substrate just under the wire patterns which increases the maximum burnout current to 4.5 A. Moreover, a maximum burnout current of 6 A was achieved when the entire backside glass substrate was recessed and a thicker copper block was electroplated, which meets most requirements of atomic physics experiments.

DOI
10.3390/s140610292

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This study describes the design and fabrication of transparent atom chips for atomic physics experiments. A fabrication process was developed to define the wire patterns on a transparent glass substrate to create the desired magnetic field for atom trapping experiments. An area on the chip was reserved for the optical access, so that the laser light can penetrate directly through the glass substrate for the laser cooling process. Furthermore, since the thermal conductivity of the glass substrate is poorer than other common materials for atom chip substrate, for example silicon, silicon carbide, aluminum nitride. Thus, heat dissipation copper blocks are designed on the front and back of the glass substrate to improve the electrical current conduction. The testing results showed that a maximum burnout current of 2 A was measured from the wire pattern (with a width of 100 μm and a height of 20 μm) without any heat dissipation design and it can increase to 2.5 A with a heat dissipation design on the front side of the atom chips. Therefore, heat dissipation copper blocks were designed and fabricated on the back of the glass substrate just under the wire patterns which increases the maximum burnout current to 4.5 A. Moreover, a maximum burnout current of 6 A was achieved when the entire backside glass substrate was recessed and a thicker copper block was electroplated, which meets most requirements of atomic physics experiments.
Atom chips are robust and extremely powerful toolboxes for quantum optical experiments, since they make it possible to create exceedingly precise magnetic traps for neutral atoms with minimal field modulations. Accurate manipulation of trapped atoms is feasible with magnetic and electric fields created on the atom chip. Therefore atom chips with high quality surfaces and extremely well defined wires were build (roughness < 20nm). Furthermore new generations of atom chips were developed, like the multi-layer atom chip with contact-free wire crossings, the sub-micron structured atom chip and the semiconducting atom chip. Extensive characterisation measurements of atom chip wires demonstrated that the wires stand current densities of up to 10^7A/cm^2 for seconds and voltage differences of more than 500V over 10µm. From the different materials tested doped silicon with a thin silicon dioxide layer is the best qualified substrate for atom chip fabrication. The atom chips fabricated during this thesis have been used in many successful experiments, yielding numerous results. Moreover this thesis established the basics for many further experiments in atom physics and quantum optics and delivers complete instructions for the fabrication of all developed atom chips as well as an introduction to the experiments.
This paper describes the design and fabrication of planarized multilayer atom chips for an ultrahigh-vacuum system in atomic physics experiments. A fabrication process is developed to define micrometer-scale wire patterns on a silicon substrate and wires are plated by copper electroplating. SU-8 is chosen as the isolation layer between the upper and bottom wires, and its thickness, surface flatness and surface roughness (Ra = 5 nm) are controlled by the chemical–mechanical planarization process. A reflectivity of nearly 90% is measured on the chip surface; thus, the former method of attaching a silver mirror is unnecessary (Du et al 2004 Phys. Rev. A 70 053606). A heat dissipation copper block is incorporated in our chip design to increase the sustainable current densities of upper wires of more than 3.8 × 105 A cm−2. Results show the improvement of 55.74%, compared with the nonheat dissipation design (2.44 × 105 A cm−2), and thus meeting the requirements for chip-based atom trapping experiments.
We present the use of direct bonded copper (DBC) for the straightforward fabrication of high power atom chips. Atom chips using DBC have several benefits: excellent copper/substrate adhesion, high purity, thick (>100 μm) copper layers, high substrate thermal conductivity, high aspect ratio wires, the potential for rapid (<8 h) fabrication, and three-dimensional atom chip structures. Two mask options for DBC atom chip fabrication are presented, as well as two methods for etching wire patterns into the copper layer. A test chip, able to support 100 A of current for 2 s without failing, is used to determine the thermal impedance of the DBC. An assembly using two DBC atom chips is used to magnetically trap laser cooled (87)Rb atoms. The wire aspect ratio that optimizes the magnetic field gradient as a function of power dissipation is determined to be 0.84:1 (height:width).
This paper describes the design and fabrication of an atom chip for atom tunneling experiments. A fabrication process was developed that uses a combination of UV-optical and Electron-Beam lithography to pattern micrometer and nanometer scale copper wires on a single chip. The minimum wire width fabricated in this work is 200 nm. The wires can carry current densities of more than 7.5times107A/cm2. The electrical current tests establish the feasibility of realizing chip-based atom tunneling experiments.
Abstract : We present the use of direct bonded copper (DBC) for the straightforward fabrication of high power atom chips. Atom chips using DBC have several benefits: excellent copper/substrate adhesion, high purity, thick (greater than 100 microns) copper layers, high substrate thermal conductivity, high aspect ratio wires, the potential for rapid (less than 8 h) fabrication, and three-dimensional atom chip structures. Two mask options for DBC atom chip fabrication are presented, as well as two methods for etching wire patterns into the copper layer. A test chip, able to support 100 A of current for 2 s without failing, is used to determine the thermal impedance of the DBC. An assembly using two DBC atom chips is used to magnetically trap laser cooled 87Rb atoms. The wire aspect ratio that optimizes the magnetic field gradient as a function of power dissipation is determined to be 0.84:1 (height:width).